Semiconductor structure having photonic die and electronic die

1. A semiconductor structure, comprising:

an encapsulated die comprising an electronic die and an insulating layer laterally covering the electronic die; and

a photonic die coupled to the encapsulated die and comprising:

an optical device in proximity to an edge coupling facet of the photonic die, wherein in a top-down view, a boundary of the electronic die is within a boundary of the insulating layer, and the boundary of the insulating layer is within a boundary of the photonic die;

a first portion physically connected to the encapsulated die, wherein the optical device is in the first portion; and

a second portion underlying the first portion and comprising a lateral dimension greater than a lateral dimension of the first portion.

2. The semiconductor structure of claim 1 , wherein the photonic die further comprises:

a semiconductor substrate comprising a first surface and a second surface opposite to each other, wherein the optical device is disposed over the first surface;

through vias penetrating through the semiconductor substrate, and

conductive terminals disposed on the second surface of the semiconductor substrate and electrically coupled to the through vias, wherein in the top-down view, a portion of the through vias is disposed in proximity to the conductive terminals and revealed by the semiconductor substrate.

3. The semiconductor structure of claim 2 , wherein the portion of the through vias is dummy vias located at a corner region of the semiconductor substrate.

4. The semiconductor structure of claim 1 , further comprising:

conductive terminals disposed on a first side of the photonic die opposite to a second side of the photonic die on which the electronic die is disposed, the conductive terminals being electrically coupled to the electronic die.

5. The semiconductor structure of claim 1 , wherein a surface roughness of a sidewall of the second portion is greater than a surface roughness of a sidewall of the first portion.

6. The semiconductor structure of claim 1 , wherein the lateral dimension of the first portion is substantially equal to a lateral dimension of the encapsulated die.

7. The semiconductor structure of claim 1 , further comprising:

a supporting substrate disposed on the encapsulated die and comprising a lateral dimension substantially equal to that of the encapsulated die.

8. A semiconductor structure, comprising:

an encapsulated die comprising an electronic die and an insulating layer laterally covering the electronic die; and

a photonic die coupled to the encapsulated die and comprising:

a semiconductor substrate; and

an optical device disposed over the semiconductor substrate and being in proximity to an edge coupling facet of the photonic die, wherein a boundary of the insulating layer extends beyond a boundary of the semiconductor substrate.

9. The semiconductor structure of claim 8 , wherein the photonic die further comprises:

an interconnecting layer interposed between the semiconductor substrate and the encapsulated die, the interconnecting layer comprising:

a first portion physically connected to the encapsulated die and comprising a first sidewall substantially aligned with a sidewall of the encapsulated die; and

a second portion interposed between the first portion and the semiconductor substrate, the second portion comprising a second sidewall laterally recessed from the first sidewall.

10. The semiconductor structure of claim 9 , wherein the second sidewall is smoother than the first sidewall.

11. The semiconductor structure of claim 8 , further comprising:

a supporting substrate overlying the encapsulated die, wherein the edge coupling facet of the photonic die is smoother than a sidewall of the supporting substrate.

12. The semiconductor structure of claim 8 , wherein the insulating layer comprises a stepped sidewall.

13. The semiconductor structure of claim 12 , wherein the stepped sidewall comprises a first sidewall and a second sidewall protruded from the first sidewall, and a surface roughness of the first sidewall is different from that of the second sidewall.

14. A semiconductor structure, comprising:

an encapsulated die comprising an electronic die and an insulating layer laterally covering the electronic die; and

a photonic die coupled to the encapsulated die and comprising:

a semiconductor substrate; and

an optical device disposed over the semiconductor substrate and being in proximity to an edge coupling facet of the photonic die, wherein a texture feature on the edge coupling facet is different from a texture feature on a sidewall of the insulating layer or a texture feature on a sidewall of the semiconductor substrate.

15. The semiconductor structure of claim 14 , wherein the texture feature on the edge coupling facet comprises etching marks and the texture feature on the sidewall of the insulating layer comprises dicing marks and etching marks.

16. The semiconductor structure of claim 15 , wherein the texture feature on the sidewall of the semiconductor substrate comprises etching marks.

17. The semiconductor structure of claim 15 , wherein the insulating layer comprises:

a first portion comprising a first sidewall with the dicing marks;

a second portion interposed between the first portion and the photonic die, and the second portion comprising a second sidewall with the etching marks.

18. The semiconductor structure of claim 14 , wherein the texture feature on the edge coupling facet comprises etching marks and the texture feature on the sidewall of the semiconductor substrate comprises dicing marks and etching marks.

19. The semiconductor structure of claim 18 , wherein the texture feature on the sidewall of the insulating layer comprises etching marks.

20. The semiconductor structure of claim 18 , wherein the semiconductor substrate comprises:

a first portion comprising a first sidewall with the dicing marks;

a second portion interposed between the first portion and the encapsulated die, and the second portion comprising a second sidewall with the etching marks.