Forming semiconductor structures with two-dimensional materials
A process is provided to fabricate a finFET device having a semiconductor layer of a two-dimensional “2D” semiconductor material. The semiconductor layer of the 2D semiconductor material is a thin film layer formed over a dielectric fin-shaped structure. The 2D semiconductor layer extends over at least three surfaces of the dielectric fin structure, e.g., the upper surface and two sidewall surfaces. A vertical protrusion metal structure, referred to as “metal fin structure”, is formed about an edge of the dielectric fin structure and is used as a seed to grow the 2D semiconductor material.
1. A structure, comprising:
a substrate;
a first structure over the substrate;
a second structure laterally in contact with an edge surface of the first structure along a first direction, the second structure including a first metal material; and
a semiconductor layer of a two-dimensional material on the first structure,
wherein the first metal material of the second structure is a seed material with respect to the two-dimensional material.
2. The structure of claim 1 , comprising a dielectric layer between the second structure and the substrate.
3. The structure of claim 1 , wherein the second structure has a smaller dimension than the first structure in the first direction.
4. The structure of claim 1 , wherein the semiconductor layer is at least partially on a surface of the second structure.
5. The structure of claim 1 , wherein the second structure extends beyond the first structure in a second direction that is substantially orthogonal to the first direction.
6. The structure of claim 1 , wherein the first metal material is one or more of tungsten, molybdenum, or platinum.
7. The structure of claim 1 , further comprising a third structure laterally adjacent to a second edge surface of the first structure, the third structure including the first metal material.
8. The structure of claim 7 , wherein the first metal material of the third structure is a seed material with respect to the two-dimensional material of the semiconductor layer.
9. The structure of claim 1 , wherein the two-dimensional material is two-dimensional tungsten disulfide.
10. The structure of claim 1 , wherein the first structure is a dielectric material.
11. A method, comprising:
forming a first structure and a second structure over a substrate, the second structure laterally adjacent to an edge portion of the first structure in a first direction, the second structure including a first metal material; and
forming a semiconductor layer of a two-dimensional material on the first structure using the first metal material as a seed.
12. The method of claim 11 , wherein the forming the first structure and the second structure includes:
forming a dielectric layer of a dielectric material over the substrate;
forming a metal layer of the first metal material over the substrate and in contact with the dielectric layer; and
patterning the dielectric layer and the metal layer together.
13. The method of claim 12 , wherein the forming the first structure and the second structure includes forming the first structure that has a smaller dimension than the second structure in a second direction that traverses the first direction.
14. The method of claim 11 , wherein the two-dimensional material is WS 2 and the forming the semiconductor layer of the two-dimensional material includes forming two-dimensional WS 2 using WO 3 powders and sulfur vapor precursor.
15. The method of claim 14 , wherein the forming the second structure includes forming the second structure that includes the first metal material of one or more of tungsten, molybdenum, or platinum.
16. A device, comprising:
a substrate;
a first structure over the substrate;
a second structure laterally in contact with an edge surface of the first structure along a first direction, the second structure including a first metal material; and
a semiconductor layer of a two-dimensional material on the first structure, the semiconductor layer in contact with the first metal material.
17. The device of claim 16 , wherein the second structure is configured to be a source or drain structure.
18. The device of claim 16 , wherein the second structure is configured to be a body contact structure.
19. The device of claim 16 , further comprising a gate structure on the semiconductor layer of the two-dimensional material on the first structure.
20. The device of claim 16 , wherein the two-dimensional material is WS 2 .