Radical etching in gate formation
A semiconductor device includes a substrate, an isolation structure on the substrate, a fin protruding from the substrate and through the isolation structure, a gate stack engaging the fin, and a gate spacer on sidewalls of the gate stack. The gate spacer includes an inner sidewall facing the gate stack and an outer sidewall opposing the inner sidewall. The inner sidewall has a first height measured from a top surface of the fin and a bowed structure in a top portion of the inner sidewall. The bowed structure extends towards the gate stack for a first lateral distance measured from a middle point of the inner sidewall. The first lateral distance is less than about 8% of the first height.
1. A semiconductor device, comprising:
a substrate;
a fin over the substrate, the fin including two source/drain regions and a channel region;
a gate structure engaging the channel region of the fin;
source/drain features on the source/drain regions of the fin;
a gate spacer between the gate structure and the source/drain features, the gate spacer having an inner sidewall interfacing the gate structure and an outer sidewall interfacing the source/drain features, the outer sidewall being lower than the inner sidewall; and
a dielectric layer over the source/drain features, wherein a top surface of the dielectric layer has a recess that is lower than the outer sidewall.
2. The semiconductor device of claim 1 , wherein a top portion of the inner sidewall has a bowed structure extending towards the gate structure.
3. The semiconductor device of claim 1 , wherein a bottom portion of the inner sidewall has a footing structure extends towards the gate structure.
4. The semiconductor device of claim 1 , wherein the fin extends lengthwise in a first direction, and wherein in a cross-sectional view along the first direction the inner sidewall has, from top to bottom, a first bowed structure extending laterally towards the gate structure, a first straight sidewall portion, and a first footing structure extending laterally towards the gate structure.
5. The semiconductor device of claim 4 , wherein the gate structure extends lengthwise in a second direction perpendicular to the first direction, and wherein in a cross-sectional view along the second direction, the inner sidewall has, from top to bottom, a second bowed structure extending laterally towards the gate structure, a second straight sidewall portion, and a second footing structure extending laterally towards the gate structure.
6. A semiconductor device, comprising:
a substrate;
a fin protruding from the substrate, the fin extending lengthwise along a first direction and including two source/drain regions and a channel region;
a gate stack over the channel region of the fin, the gate stack extending lengthwise along a second direction perpendicular to the first direction;
source/drain features on the source/drain regions of the fin;
a gate spacer on sidewall of the gate stack and between the gate structure and the source/drain features, the gate spacer including an inner sidewall interfacing the gate stack and an outer sidewall interfacing the source/drain features, the outer sidewall being lower than the inner sidewall, in a cross-sectional view along the first direction the inner sidewall has, from top to bottom, a first bowed structure extending laterally towards the gate stack, a first straight sidewall portion, and a first footing structure extending laterally towards the gate stack; and
a dielectric layer over the source/drain features, wherein a top surface of the dielectric layer has a recess that is lower than the outer sidewall.
7. The semiconductor device of claim 6 , wherein a lateral distance from a tip of the first bowed structure to the first straight sidewall portion measured along the first direction is less than about 8% of a height of the gate spacer.
8. The semiconductor device of claim 6 , wherein a lateral distance from a tip of the first footing structure to the first straight sidewall portion measured along the first direction is less than about 8% of a height of the gate spacer.
9. The semiconductor device of claim 6 , wherein the gate spacer includes an outer sidewall opposing the inner sidewall, and the outer sidewall is lower than the inner sidewall.
10. The semiconductor device of claim 6 , wherein the first straight sidewall portion is perpendicular to a top surface of the fin.
11. The semiconductor device of claim 6 , wherein in a cross-sectional view along the second direction, the inner sidewall has, from top to bottom, a second bowed structure extending laterally towards the gate stack, a second straight sidewall portion, and a second footing structure extending laterally towards the gate stack.
12. The semiconductor device of claim 11 , wherein a lateral distance from a tip of the second bowed structure to the second straight sidewall portion measured along the second direction is less than about 8% of a height of the gate spacer, and a lateral distance from a tip of the second footing structure to the second straight sidewall portion measured along the second direction is less than about 8% of the height of the gate spacer.
13. A semiconductor device, comprising:
a substrate;
an isolation structure on the substrate;
a fin protruding from the substrate and through the isolation structure, the fin extending lengthwise along a first direction;
a gate stack engaging the fin, the gate stack extending lengthwise along a second direction different from the first direction;
a gate spacer on sidewalls of the gate stack, the gate spacer including an inner sidewall facing the gate stack and an outer sidewall opposing the inner sidewall, in a cross-sectional view along the first direction the inner sidewall having a first height measured from a top surface of the fin and a footing structure in a bottom portion of the inner sidewall, the footing structure extending towards the gate stack for a first lateral distance measured from a middle point of the inner sidewall along the first direction, the first lateral distance being less than about 8% of the first height;
source/drain features on the fin; and
a dielectric layer on the source/drain features, wherein a top surface of the dielectric layer is declined towards its center.
14. The semiconductor device of claim 13 , wherein in the cross-sectional view along the first direction the outer sidewall has a second height measured from the top surface of the fin, and the second height is smaller than the first height.
15. The semiconductor device of claim 13 , wherein in a cross-sectional view along the second direction the inner sidewall has a third height measured from a top surface of the isolation structure and the outer sidewall has a fourth height measured from the top surface of the isolation structure, the third height substantially equals the fourth height.
16. The semiconductor device of claim 13 , wherein in a cross-sectional view along the second direction the inner sidewall has a third height measured form a top surface of the isolation structure, and in the cross-sectional view along the second direction the top portion of the inner sidewall has another bowed structure extending towards the gate stack for a third lateral distance measured from a middle point of the inner sidewall along the second direction.
17. The semiconductor device of claim 16 , wherein the third lateral distance is less than about 8% of the third height.
18. The semiconductor device of claim 13 , wherein in the cross-sectional view along the first direction a top portion of the inner sidewall has a bowed structure, and the bowed structure extends towards the gate stack for a second lateral distance measured from the middle point of the inner sidewall along the first direction.
19. The semiconductor device of claim 18 , wherein the second lateral distance is less than about 8% of the first height.
20. The semiconductor device of claim 18 , wherein in the cross-sectional view along the first direction a middle portion of the inner sidewall is a straight sidewall extending from the bowed structure to the footing structure, and the straight sidewall is perpendicular to the top surface of the fin.