IP Library › Granted Patent US 12,394,619
Granted Patent B2
US 12,394,619 · App. 18/210,651 · Granted Aug 19, 2025

Metal oxide preclean for bottom-up gapfill in MEOL and BEOL

Inventors: Shiyu Yue (Santa Clara, CA); Jiajie Cen (Santa Clara, CA); Sahil Jaykumar Patel (Sunnyvale, CA); Zhimin Qi (Santa Clara, CA); Ju Hyun Oh (San Jose, CA); Aixi Zhang (Santa Clara, CA); Xingyao Gao (Santa Jose, CA); Wei Lei (Santa Clara, CA); Yi Xu (San Jose, CA); Yu Lei (Belmont, CA); Tsung-Han Yang (San Jose, CA); Xiaodong Wang (San Jose, CA); Xiangjin Xie (Fremont, CA); Yixiong Yang (San Jose, CA); Kevin Kashefi (Dublin, CA); Rongjun Wang (Dublin, CA)
Assignee: APPLIED MATERIALS, INC.
H01L21/02046H01L21/0206H01L21/31111
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Quick Facts
Patent No.
US 12,394,619
App. No.
18/210,651
Granted
Aug 19, 2025
Kind
B2
Abstract

A method of pre-cleaning in a semiconductor structure includes performing a plasma pre-treatment process to remove impurities from a surface of a semiconductor structure comprising a metal layer and a dielectric layer, performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including molybdenum chloride (MoCl 5 , MoCl 6 ) at a temperature of between 250° C. and 350° C., and performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure.

Claims (29)

1. A method of pre-cleaning in a semiconductor structure, the method comprising:

performing a plasma pre-treatment process to remove impurities from a surface of the semiconductor structure comprising a metal layer and a dielectric layer, wherein the plasma pre-treatment process comprises exposing the surface of the semiconductor structure to a plasma formed from a process gas including hydrogen (H 2 )-containing gas and a plasma formed from a process gas including oxygen (O 2 ) gas in sequence;

performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including at least one of molybdenum chloride (MoCl 5 or MoCl 6 ) or tungsten chloride (WCl 5 or WCl 6 ) at a temperature of between 250° C. and 450° C.; and

performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure, wherein the post-treatment process comprises a capacitively coupled plasma (CCP) process, in which the surface of the semiconductor structure is exposed to a plasma formed from a hydrogen (H 2 )-containing gas.

2. The method of claim 1 , wherein an etch selectivity of molybdenum oxide (MoO x ) to molybdenum (Mo) is more than 16.

3. The method of claim 1 , wherein the plasma pre-treatment process comprises an inductively coupled plasma (ICP) process, a capacitively coupled plasma (CCP) process, or a remote plasma assisted process.

4. A method of pre-cleaning in a semiconductor structure, the method comprising:

performing a plasma pre-treatment process to remove impurities from a surface of the semiconductor structure comprising a metal layer and a dielectric layer;

performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including at least one of molybdenum chloride (MoCl 5 or MoCl 6 ) or tungsten chloride (WCl 5 or WCl 6 ) at a temperature of between 250° C. and 450° C.; and

performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure,

wherein the post-treatment process comprises a thermal bake process, in which the surface of the semiconductor structure is heated to and maintained at a temperature of between 350° C. and 450° C.

5. The method of claim 4 , wherein an etch selectivity of molybdenum oxide (MoO x ) to molybdenum (Mo) is more than 16.

6. The method of claim 4 , wherein the plasma pre-treatment process comprises exposing the surface of the semiconductor structure to a plasma formed from a process gas including both hydrogen (H 2 )-containing gas and oxygen (O 2 ) gas.

7. The method of claim 5 , wherein the plasma pre-treatment process comprises an inductively coupled plasma (ICP) process or a capacitively coupled plasma (CCP) process performed.

8. The method of claim 4 , wherein the plasma pre-treatment process comprises exposing the surface of the semiconductor structure to a plasma formed from a process gas including hydrogen (H 2 )-containing gas and a plasma formed from a process gas including oxygen (O 2 ) gas in sequence.

9. The method of claim 8 , wherein the plasma pre-treatment process comprises an inductively coupled plasma (ICP) process, a capacitively coupled plasma (CCP) process, or a remote plasma assisted process.

10. A method of pre-cleaning in a semiconductor structure, the method comprising:

performing a plasma pre-treatment process to remove impurities from a surface of the semiconductor structure, wherein the plasma pre-treatment process comprises:

an inductively coupled plasma (ICP) process, a capacitively coupled plasma (CCP) process, or a remote plasma assisted process, in which the surface of the semiconductor structure is exposed to a plasma formed from a process gas including hydrogen (H 2 )-containing gas and a plasma formed from a process gas including oxygen (O 2 ) gas in sequence; and

performing a selective etch process to remove molybdenum oxide from the surface of the semiconductor structure comprising a metal layer and a dielectric layer, the selective etch process comprising:

soaking the semiconductor structure in a precursor including at least one of molybdenum chloride (MoCl 5 or MoCl 6 ), tungsten chloride (WCl 5 or WCl 6 ), tungsten fluoride (WF 6 ), or molybdenum fluoride (MoF 6 ) at a temperature of between 250° C. and 450° C., wherein

the metal layer comprises molybdenum (Mo).

11. The method of claim 10 , wherein an etch selectivity of molybdenum oxide (MoO x ) to molybdenum (Mo) is more than 16.

12. The method of claim 10 , further comprising:

performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure,

wherein the post-treatment process comprises a plasma process in which the surface of the semiconductor structure is exposed to a plasma formed from a hydrogen (H 2 )-containing gas.

13. The method of claim 10 , further comprising:

performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure,

wherein the post-treatment process comprises a thermal bake process in which the surface of the semiconductor structure is heated to and maintained at a temperature of between 350° C. and 450° C.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING DATE PREVIOUSLY RECORDED AT REEL: 66002 FRAME: 0741. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 4, 2024
From: YUE, SHIYU; CEN, JIAJIE; PATEL, SAHIL JAYKUMAR; QI, ZHIMIN; OH, JU HYUN; ZHANG, AIXI; GAO, XINGYAO; LEI, WEI; XU, YI; LEI, YU; YANG, TSUNG-HAN; WANG, XIAODONG; XIE, XIANGJIN; YANG, YIXIONG; KASHEFI, KEVIN; WANG, RONGJUN
To: APPLIED MATERIALS, INC.
Reel/Frame 067021/0794 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2024
From: YUE, SHIYU; CEN, JIAJIE; PATEL, SAHIL JAYKUMAR; QI, ZHIMIN; OH, JU HYUN; ZHANG, AIXI; GAO, XINGYAO; LEI, WEI; XU, YI; LEI, YU; YANG, TSUNG-HAN; WANG, XIAODONG; XIE, XIANGJIN; YANG, YIXIONG; KASHEFI, KEVIN; WANG, RONGJUN
To: APPLIED MATERIALS, INC.
Reel/Frame 066002/0741 →
Continuity (1)
Related Publication 20240420947A1 · Dec 19, 2024
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