Granted Patent B2

US 12,402,496 · App. 17/555,671 · Granted Aug 26, 2025

Inventors: Hidetomo Kobayashi (Isehara, JP); Hideaki Shishido (Atsugi, JP); Shuichi Katsui (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H10K59/131H10D30/6713H10D30/6743H10D30/6757

Abstract

Claims (94)

1. A display device comprising:

a first transistor;

a second transistor;

a first wiring configured to be supplied with a source signal;

a second wiring configured to be supplied with a gate signal;

a third wiring configured to be supplied with a constant potential; and

a pixel electrode,

wherein one of a source and a drain of the first transistor is electrically connected to the first wiring,

wherein a gate of the first transistor is electrically connected to the second wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the pixel electrode,

wherein the other of the source and the drain of the second transistor is electrically connected to the third wiring,

wherein the first wiring extends in a first direction,

wherein the second wiring extends in a second direction,

wherein the second direction is a direction intersecting the first direction,

wherein the first wiring and the pixel electrode overlap each other with the third wiring therebetween, and

wherein each of the first transistor and the second transistor comprises a semiconductor layer in which current flows in the same direction.

2. The display device according to claim 1 , wherein each of the first transistor and the second transistor comprises a semiconductor layer in which current flows in the first direction.

3. The display device according to claim 1 , wherein each of the first transistor and the second transistor comprises a semiconductor layer in which current flows in the second direction.

4. The display device according to claim 1 , further comprising a plurality of dummy layers,

wherein the first transistor comprises a semiconductor layer,

wherein each of the plurality of dummy layers comprises a semiconductor material same as the semiconductor layer of the first transistor,

wherein each of the plurality of dummy layers comprises a portion having substantially the same top surface shape as the semiconductor layer of the first transistor, and

wherein the plurality of dummy layers and the semiconductor layer are arranged at a regular interval in the second direction.

5. The display device according to claim 1 , further comprising a plurality of dummy layers,

wherein the first transistor comprises a semiconductor layer,

wherein each of the plurality of dummy layers comprises a semiconductor material same as the semiconductor layer of the first transistor,

wherein each of the plurality of dummy layers comprises a portion having substantially the same top surface shape as the semiconductor layer of the first transistor, and

wherein the plurality of dummy layers and the semiconductor layer are arranged at a regular interval in the first direction.

6. The display device according to claim 1 , further comprising:

a fourth wiring;

a third transistor; and

a fourth transistor,

wherein one of a source and a drain of the third transistor is electrically connected to the fourth wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the second transistor,

wherein one of a source and a drain of the fourth transistor is electrically connected to the fourth wiring,

wherein the other of the source and the drain of the fourth transistor is electrically connected to the pixel electrode,

wherein the third wiring is supplied with a first potential,

wherein the fourth wiring is supplied with a second potential, and

wherein the second potential is lower than the first potential.

7. The display device according to claim 1 , further comprising a third transistor,

wherein the third transistor comprises silicon in a channel formation region,

wherein the first transistor comprises indium or zinc, or both indium and zinc in a channel formation region, and

wherein each of the first transistor and the second transistor is positioned over the third transistor.

8. The display device according to claim 1 ,

wherein the third wiring has a top surface shape in a form of lattice,

wherein the third wiring comprises a first portion extending in the first direction and a second portion extending in the second direction, and

wherein the pixel electrode and the first wiring overlap each other with the first portion therebetween.

9. The display device according to claim 1 , further comprising a plurality of light-emitting regions,

wherein one of the plurality of light-emitting regions is surrounded by six of the plurality of light-emitting regions in a plan view.

10. The display device according to claim 9 ,

wherein the one of the plurality of light-emitting regions has a hexagonal shape in the plan view,

wherein each of two interior angles of the hexagonal shape is larger than 120°,

wherein each of the other four interior angles of the hexagonal shape is smaller than 120°, and

wherein the two interior angles are positioned at the opposite corners to each other.

11. The display device according to claim 9 ,

wherein the one of the plurality of light-emitting regions has a hexagonal shape in the plan view, and

wherein each of two interior angles of the hexagonal shape is larger than 120°.

12. The display device according to claim 9 ,

wherein the plurality of light-emitting regions comprises adjacent three light-emitting regions, and

wherein the adjacent three light-emitting regions are positioned to be on vertices of an isosceles triangle.

13. A display module comprising:

the display device according to claim 1 ; and

a connector or an integrated circuit.

14. An electronic device comprising:

the display module according to claim 13 ; and

at least one of an antenna, a battery, a housing, a camera, a speaker, a microphone, a touch sensor and an operation button.

15. A display device comprising:

a first wiring configured to be supplied with a source signal;

a second wiring configured to be supplied with a gate signal;

a third wiring configured to be supplied with a constant potential; and

a pixel electrode,

wherein the first wiring extends in a first direction,

wherein the second wiring extends in a second direction,

wherein the second direction is a direction intersecting the first direction,

wherein the first wiring and the pixel electrode overlap each other with the third wiring therebetween,

wherein the third wiring has a top surface shape in a form of lattice,

wherein the third wiring comprises a first portion extending in the first direction and a second portion extending in the second direction, and

wherein the pixel electrode and the first wiring overlap each other with the first portion therebetween.

16. The display device according to claim 15 , further comprising a first transistor and a second transistor,

wherein one of a source and a drain of the first transistor is electrically connected to the first wiring,

wherein a gate of the first transistor is electrically connected to the second wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the pixel electrode,

wherein the other of the source and the drain of the second transistor is electrically connected to the third wiring.

17. The display device according to claim 16 , further comprising a plurality of dummy layers,

wherein the first transistor comprises a semiconductor layer,

wherein each of the plurality of dummy layers comprises a semiconductor material same as the semiconductor layer of the first transistor,

wherein each of the plurality of dummy layers comprises a portion having substantially the same top surface shape as the semiconductor layer of the first transistor, and

wherein the plurality of dummy layers and the semiconductor layer are arranged at a regular interval in the second direction.

18. A display module comprising:

the display device according to claim 15 ; and

a connector or an integrated circuit.

19. An electronic device comprising:

the display module according to claim 18 ; and

at least one of an antenna, a battery, a housing, a camera, a speaker, a microphone, a touch sensor and an operation button.

Assignments (1)

Priority Claims (2)

Continuity (1)

References Cited (39)