Granted Patent B2

US 12,424,519 · App. 17/809,502 · Granted Sep 23, 2025

Inventor: Shuangshuang Wu (Hefei, CN)

Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.

H01L23/481H01L21/76805H01L21/76829H01L21/7684H01L21/76843H01L21/76895H01L21/76898H01L23/535

Abstract

Claims (47)

1. A method for manufacturing a semiconductor structure, comprising:

providing a base comprising a substrate, a first isolation layer, a first dielectric layer, and a stop layer that are formed in a stack manner;

forming in the base a first contact hole extending from the stop layer into the substrate, wherein a rim of the first contact hole is flush with an upper surface of the stop layer;

forming sequentially on an inner wall of the first contact hole a first insulating layer, a first barrier layer and a first contact structure filling the first contact hole, wherein an upper surface of the first contact structure is exposed;

forming a protective layer covering the upper surface of the first contact structure;

forming a second dielectric layer and a second isolation layer on the protective layer in a stack manner;

forming a second contact hole penetrating through the second dielectric layer, the second isolation layer, and the protective layer, stopping at the first contact structure, and exposing the upper surface of the first contact structure; and

forming on an inner wall of the second contact hole a second barrier layer and a second contact structure filing the second contact hole;

wherein the forming sequentially on an inner wall of the first contact hole a first insulating layer, a first barrier layer and a first contact structure filling the first contact hole comprises:

forming the first insulating layer covering the upper surface of the stop layer and the inner wall of the first contact hole;

forming the first barrier layer covering an upper surface of the first insulating layer;

depositing a semiconductor material on a surface of the first barrier layer, to form the first contact structure covering the first barrier layer and filling the first contact hole; and

removing the first insulating layer, the first barrier layer, and the first contact structure on the upper surface of the stop layer, to make the upper surface of the first contact structure in the first contact hole flush with the upper surface of the stop layer;

wherein the forming a protective layer covering the upper surface of the first contact structure comprises:

forming the protective layer covering the upper surface of the first contact structure and a surface of the stop layer by a deposition process.

2. The method for manufacturing a semiconductor structure according to claim 1 , wherein the removing the first insulating layer, the first barrier layer, and the first contact structure on the upper surface of the stop layer, to make the upper surface of the first contact structure in the first contact hole flush with the upper surface of the stop layer comprises:

removing the first insulating layer and the first barrier layer on the upper surface of the stop layer and a partial structure of the first contact structure by a polishing process, to make the upper surface of the first contact structure flush with the upper surface of the stop layer.

3. The method for manufacturing a semiconductor structure according to claim 1 , wherein the forming a protective layer covering the upper surface of the first contact structure comprises:

forming the protective layer covering the upper surface of the first contact structure by a deposition process, wherein a material for forming the protective layer comprises tantalum or silicon nitride.

4. The method for manufacturing a semiconductor structure according to claim 1 , wherein the forming a second contact hole penetrating through the second dielectric layer, the second isolation layer, and the protective layer, stopping at the first contact structure, and exposing the upper surface of the first contact structure comprises:

performing etching, to sequentially remove partial structures of the second dielectric layer, the second isolation layer, and the protective layer, thereby forming the second contact hole stopping at the first contact structure and exposing the upper surface of the first contact structure.

5. The method for manufacturing a semiconductor structure according to claim 1 , wherein the forming on an inner wall of the second contact hole a second barrier layer and a second contact structure filing the second contact hole comprises:

forming the second barrier layer covering a surface of the second isolation layer and the inner wall of the second contact hole;

depositing a semiconductor material on a surface of the second barrier layer, to form the second contact structure covering the second barrier layer and filling the second contact hole; and

removing the second barrier layer and the second contact structure on an upper surface of the second isolation layer, to make an upper surface of the second contact structure in the second contact hole flush with the upper surface of the second isolation layer.

6. The method for manufacturing a semiconductor structure according to claim 5 , wherein the removing the second barrier layer and the second contact structure on an upper surface of the second isolation layer, to make an upper surface of the second contact structure in the second contact hole flush with the upper surface of the second isolation layer comprises:

removing the second barrier layer on the upper surface of the second isolation layer and a partial structure of the second contact structure by a polishing process, to make the upper surface of the second contact structure flush with the upper surface of the second isolation layer.

7. The method for manufacturing a semiconductor structure according to claim 1 , wherein

the stop layer is formed by a deposition process and covers a surface of the first dielectric layer, and wherein a material forming the stop layer comprises silicon nitride.

8. The method for manufacturing a semiconductor structure according to claim 1 , further comprising:

forming in the base a conductive via stopping at at least one of a semiconductor device or a conductive structure, and correspondingly exposing at least one of an upper surface of the semiconductor device or an upper surface of the conductive structure; and

forming an electrical contact structure filling the conductive via.

9. The method for manufacturing a semiconductor structure according to claim 8 , wherein the forming in the base a conductive via stopping at at least one of a semiconductor device or a conductive structure, and correspondingly exposing at least one of an upper surface of the semiconductor device or an upper surface of the conductive structure comprises:

forming a sacrifice layer covering the stop layer; and

performing etching to sequentially remove partial structures of the sacrifice layer, the stop layer, and the first dielectric layer, thereby forming the conductive via stopping at at least one of the semiconductor device or the conductive structure, wherein a rim of the conductive via is formed on an upper surface of the sacrifice layer.

10. The method for manufacturing a semiconductor structure according to claim 9 , wherein the forming an electrical contact structure filling the conductive via comprises:

depositing a semiconductor material on a surface of the sacrifice layer, to form the electrical contact structure covering the sacrifice layer and filling the conductive via; and

removing the electrical contact structure and the sacrifice layer on the upper surface of the stop layer, to make an upper surface of the electrical contact structure in the conductive via flush with the upper surface of the stop layer.

11. The method for manufacturing a semiconductor structure according to claim 10 , wherein the removing the electrical contact structure and the sacrifice layer on the upper surface of the stop layer, to make an upper surface of the electrical contact structure in the conductive via flush with the upper surface of the stop layer comprises:

removing the sacrifice layer on the upper surface of the stop layer and a partial structure of the electrical contact structure by a polishing process, to make the upper surface of the electrical contact structure flush with the upper surface of the stop layer.

12. The method for manufacturing a semiconductor structure according to claim 8 , wherein the forming in the base a conductive via stopping at at least one of a semiconductor device or a conductive structure, and correspondingly exposing at least one of an upper surface of the semiconductor device or an upper surface of the conductive structure comprises:

performing etching, to remove a partial structure of the first dielectric layer, thereby forming the conductive via stopping at at least one of the semiconductor device or the conductive structure, wherein a rim of the conductive via is formed on an upper surface of the first dielectric layer.

13. The method for manufacturing a semiconductor structure according to claim 12 , wherein the forming an electrical contact structure filling the conductive via comprises:

depositing a semiconductor material on a surface of the first dielectric layer, to form the electrical contact structure covering the first dielectric layer and filling the conductive via; and

removing the electrical contact structure on the upper surface of the first dielectric layer, to make the upper surface of the electrical contact structure in the conductive via flush with the upper surface of the first dielectric layer.

14. The method for manufacturing a semiconductor structure according to claim 13 , wherein the removing the electrical contact structure on the upper surface of the first dielectric layer, to make the upper surface of the electrical contact structure in the conductive via flush with the upper surface of the first dielectric layer comprises:

removing the electrical contact structure on the upper surface of the first dielectric layer by a polishing process, to make the upper surface of the electrical contact structure flush with the upper surface of the first dielectric layer.

Assignments (1)

Priority Claims (1)

Continuity (2)

References Cited (14)