IP Library Granted Patent US 12,424,537
Granted Patent B2
US 12,424,537 · App. 17/583,789 · Granted Sep 23, 2025

Interconnect structure and methods of forming the same

Inventors: Yao-Jen Tsai (Kaohsiung, TW); Chih-Fu Chang (Pingtung, TW); Sheng Chiang Hung (Hsinchu, TW); Chin-Yuan Ko (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L23/5223H01L23/5226H01L23/5228H10D1/042H10D1/47H10D1/716H10D88/00
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Quick Facts
Patent No.
US 12,424,537
App. No.
17/583,789
Granted
Sep 23, 2025
Kind
B2
Abstract

An interconnect structure and methods of forming the same are described. In some embodiments, the structure includes a first intermetal dielectric (IMD) layer disposed over a plurality of conductive features and a first passive component disposed on the first IMD layer in a first region of the substrate. The structure further includes a second passive component disposed on the first IMD layer in a second region of the substrate. The second passive component includes a first conductive layer, and the first conductive layer has a first thickness. The structure further includes a second IMD layer disposed on the first passive component in the first region and on the second passive component and a portion of the first IMD layer in the second region. The second IMD layer has a second thickness ranging from about five times to about 20 times the first thickness.

Claims (51)

1. A method, comprising:

forming a first intermetal dielectric (IMD) layer over a plurality of conductive features;

forming a first passive component over the first IMD layer, comprising:

forming a first conductive layer over the first IMD layer;

forming a first insulating layer on the first conductive layer;

forming a second conductive layer on the first insulating layer;

forming a second insulating layer on the second conductive layer; and

forming a third conductive layer on the second insulating layer;

forming a second passive component over the first IMD layer, comprising:

forming a fourth conductive layer over the first IMD layer, wherein the fourth conductive layer is formed at the same time as the first, second, or third conductive layer; and

forming a second IMD layer on the first and second passive components.

2. The method of claim 1 , further comprising forming a mask on the fourth conductive layer prior to forming the first insulating layer.

3. The method of claim 1 , wherein the first insulating layer is formed on both the first conductive layer and the fourth conductive layer.

4. The method of claim 1 , wherein the fourth conductive layer is formed at the same time as the first conductive layer.

5. The method of claim 4 , wherein forming the first and fourth conductive layers comprise depositing a conductive layer and patterning the conductive layer.

6. The method of claim 1 , further comprising forming first and second conductive features through the fourth conductive layer.

7. The method of claim 6 , further comprising forming a third conductive feature through the first and third conductive layers.

8. The method of claim 7 , further comprising forming a fourth conductive feature through the second conductive layer.

9. The method of claim 1 , further comprising:

depositing a mask on the fourth conductive layer, wherein the mask covers a side surface of the fourth conductive layer.

10. The method of claim 9 , wherein the second IMD layer covers a side surface of the third conductive layer and a side surface of the fourth conductive layer.

11. The method of claim 9 , wherein the fourth conductive layer has a first thickness, and the second IMD layer has a second thickness that is about five times to about twenty times the first thickness.

12. The method of claim 9 , further comprising forming a first conductive feature through the first insulating layer, the second insulating layer, and the second conductive layer.

13. The method of claim 12 , further comprising forming a second conductive feature through the first insulating layer, the second insulating layer, the first conductive layer, and the third conductive layer.

14. The method of claim 13 , further comprising forming third and fourth conductive features through the fourth conductive layer.

15. The method of claim 1 , wherein the fourth conductive layer is formed at the same time as the second conductive layer.

16. The method of claim 15 , wherein forming the second and fourth conductive layers comprise depositing a conductive layer and patterning the conductive layer.

17. The method of claim 1 , wherein the fourth conductive layer is formed at the same time as the third conductive layer.

18. The method of claim 17 , wherein forming the third and fourth conductive layers comprise depositing a conductive layer and patterning the conductive layer.

19. A method, comprising:

forming a first intermetal dielectric (IMD) layer over a plurality of conductive features;

forming a first passive component over the first IMD layer, comprising:

forming a first conductive layer over the first IMD layer;

forming a first insulating layer on the first conductive layer;

forming a second conductive layer on the first insulating layer;

forming a second insulating layer on the second conductive layer; and

forming a third conductive layer on the second insulating layer;

forming a second passive component over the first IMD layer, comprising:

forming a fourth conductive layer over the first IMD layer, wherein the fourth conductive layer is formed at the same time as the first, second, or third conductive layer; and

forming a second IMD layer on the first and second passive components, wherein the second IMD layer covers a side surface of the third conductive layer and a side surface of the fourth conductive layer.

20. A method, comprising:

forming a first intermetal dielectric (IMD) layer over a plurality of conductive features;

forming a first passive component over the first IMD layer, comprising:

forming a first conductive layer over the first IMD layer;

forming a first insulating layer on the first conductive layer;

forming a second conductive layer on the first insulating layer;

forming a second insulating layer on the second conductive layer; and

forming a third conductive layer on the second insulating layer;

forming a second passive component over the first IMD layer, comprising:

forming a fourth conductive layer over the first IMD layer, wherein the fourth conductive layer is formed at the same time as the first, second, or third conductive layer; and

forming a second IMD layer on the first and second passive components, wherein the second IMD layer is deposited on the second insulating layer.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE TYPO ERROR OF THE 3RD ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 59034 FRAME: 419. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 28, 2024
From: TSAI, YAO-JEN; CHANG, CHIH-FU; HUNG, SHENG CHIANG; KO, CHIN-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069717/0346 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2022
From: TSAI, YAO-JEN; CHANG, CHIH-FU; HUAG, SHENG CHIANG; KO, CHIN-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 059034/0419 →
Continuity (2)
Provisional Application 63227752 · Jul 30, 2021
Related Publication 20230035580A1 · Feb 2, 2023
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