Method of forming capacitor hole, and semiconductor structure
The present disclosure provides a method of forming a capacitor hole, and a semiconductor structure. The method includes: providing a substrate, where an electrode is formed in the substrate; forming a pattern definition layer on a surface of the substrate; sequentially forming three sets of trenches in the pattern definition layer, where the three sets of trenches intersect with each other at 120°, and a hexagonal hole is formed at an intersection position in the pattern definition layer; etching the substrate along the hexagonal hole by the pattern definition layer as a mask, to form a capacitor hole in the substrate, where a bottom of the capacitor hole is round under a loading effect of etching, and the electrode is exposed at the bottom of the capacitor hole.
1. A method of forming a capacitor hole, comprising:
providing a substrate, wherein an electrode is formed in the substrate;
forming a pattern definition layer on a surface of the substrate;
sequentially forming three sets of trenches in the pattern definition layer, wherein the three sets of trenches intersect with each other at 120°, and a hexagonal hole is formed at an intersection position in the pattern definition layer; and
etching the substrate along the hexagonal hole by the pattern definition layer as a mask, to form a capacitor hole in the substrate, wherein a bottom of the capacitor hole is round under a loading effect of etching, and the electrode is exposed at the bottom of the capacitor hole.
2. The method of forming a capacitor hole according to claim 1 , wherein the forming a pattern definition layer on a surface of the substrate comprises:
forming a first passivation layer on the surface of the substrate; and
forming a first anti-reflection layer on a surface of the first passivation layer, wherein the first anti-reflection layer and the first passivation layer jointly constitute the pattern definition layer, and the three sets of trenches are formed in the first anti-reflection layer.
3. The method of forming a capacitor hole according to claim 2 , wherein, after the three sets of trenches are formed in the first anti-reflection layer, the hexagonal hole is formed in the first passivation layer at the intersection position of the three sets of trenches.
4. The method of forming a capacitor hole according to claim 1 , wherein forming a first set of trenches in the pattern definition layer comprises:
forming a first mask layer on a surface of the pattern definition layer;
forming a first trench structure on a surface of the first mask layer through a pitch doubling process; and
etching the pattern definition layer by the first mask layer as a mask, and transferring the first trench structure to the pattern definition layer to form the first set of trenches.
5. The method of forming a capacitor hole according to claim 4 , wherein the forming a first trench structure on a surface of the first mask layer through a pitch doubling process comprises:
forming a first photoresist layer on the surface of the first mask layer;
patterning the first photoresist layer to form a first opening;
forming a first sacrificial layer on the surface of the first mask layer and a surface of the first photoresist layer, wherein the first sacrificial layer covers a side wall and a bottom wall of the first opening; and
etching to remove part of the first sacrificial layer on the surface of the first mask layer and the first sacrificial layer on a top of the first photoresist layer, wherein the remaining first sacrificial layer is the first trench structure.
6. The method of forming a capacitor hole according to claim 4 , wherein the forming a first mask layer on a surface of the pattern definition layer comprises:
forming a second passivation layer on the surface of the pattern definition layer; and
forming a second anti-reflection layer on a surface of the second passivation layer, wherein the second anti-reflection layer and the second passivation layer jointly constitute the first mask layer.
7. The method of forming a capacitor hole according to claim 1 , wherein forming a second set of trenches in the pattern definition layer comprises:
forming a second mask layer on a surface of the pattern definition layer, wherein the second mask layer fills the first set of trenches;
forming a second trench structure on a surface of the second mask layer through a pitch doubling process; and
etching the pattern definition layer by the second mask layer as a mask, and transferring the second trench structure to the pattern definition layer to form the second set of trenches.
8. The method of forming a capacitor hole according to claim 7 , wherein the forming a second trench structure on a surface of the second mask layer through a pitch doubling process comprises:
forming a second photoresist layer on the surface of the second mask layer;
patterning the second photoresist layer to form a second opening;
forming a second sacrificial layer on the surface of the second mask layer and a surface of the second photoresist layer, wherein the second sacrificial layer covers a side wall and a bottom wall of the second opening; and
etching to remove part of the second sacrificial layer on the surface of the second mask layer and the second sacrificial layer on a top of the second photoresist layer, wherein the remaining second sacrificial layer is the second trench structure.
9. The method of forming a capacitor hole according to claim 7 , wherein the forming a second mask layer on a surface of the pattern definition layer comprises:
forming a third passivation layer on the surface of the pattern definition layer, wherein the third passivation layer fills the first set of trenches; and
forming a third anti-reflection layer on a surface of the third passivation layer, wherein the third anti-reflection layer and the third passivation layer jointly constitute the second mask layer.
10. The method of forming a capacitor hole according to claim 9 , wherein the third passivation layer is formed on the pattern definition layer through a spin coating process.
11. The method of forming a capacitor hole according to claim 1 , wherein forming a third set of trenches in the pattern definition layer comprises:
forming a third mask layer on a surface of the pattern definition layer, wherein the third mask layer fills the first set of trenches and the second set of trenches;
forming a third trench structure on a surface of the third mask layer through a pitch doubling process; and
etching the pattern definition layer by the third mask layer as a mask, and transferring the third trench structure to the pattern definition layer to form the third set of trenches.
12. The method of forming a capacitor hole according to claim 11 , wherein the forming a third trench structure on a surface of the third mask layer through a pitch doubling process comprises:
forming a third photoresist layer on the surface of the third mask layer;
patterning the third photoresist layer to form a third opening;
forming a third sacrificial layer on the surface of the third mask layer and a surface of the third photoresist layer, wherein the third sacrificial layer covers a side wall and a bottom wall of the third opening; and
etching to remove part of the third sacrificial layer on the surface of the third mask layer and the third sacrificial layer on a top of the third photoresist layer, wherein the remaining third sacrificial layer is the third trench structure.
13. The method of forming a capacitor hole according to claim 11 , wherein the forming a third mask layer on a surface of the pattern definition layer comprises:
forming a fourth passivation layer on the surface of the pattern definition layer, wherein the fourth passivation layer fills the first set of trenches and the second set of trenches; and
forming a fourth anti-reflection layer on a surface of the fourth passivation layer, wherein the fourth anti-reflection layer and the fourth passivation layer jointly constitute the third mask layer.
14. The method of forming a capacitor hole according to claim 13 , wherein the fourth passivation layer is formed on the pattern definition layer through a spin coating process.