IP Library › Granted Patent US 12,431,439
Granted Patent B2
US 12,431,439 · App. 18/494,827 · Granted Sep 30, 2025

Semiconductor package and semiconductor device

Inventors: Ryujiro Bando (Inagi, JP); Hitoshi Ikei (Yokohama, JP)
Assignee: KIOXIA CORPORATION
H01L23/552H05K1/0306H01L23/49816H01L24/32H01L25/0657H01L2224/32145H01L2224/32225H01L2225/06562H01L2924/14511H05K1/181H05K3/3494H05K2201/0112H05K2201/0175H05K2201/0989H05K2201/10159
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Quick Facts
Patent No.
US 12,431,439
App. No.
18/494,827
Granted
Sep 30, 2025
Kind
B2
Abstract

A semiconductor package of an embodiment includes a wiring substrate, a semiconductor chip provided on an upper surface of the wiring substrate, a sealing resin covering surfaces of the wiring substrate and the semiconductor chip, an infrared reflection layer containing any of aluminum, aluminum oxide, and titanium oxide, and an external terminal provided on a lower surface of the wiring substrate. The wiring substrate is electrically connectable with a printed wiring board through the external terminal. The infrared reflection layer is provided to the sealing resin on an upper side of a surface of the semiconductor chip on a side opposite to an upper surface of the wiring substrate.

Claims (27)

1. A semiconductor device comprising:

a semiconductor package including

a wiring substrate having a first surface and a second surface on a side opposite to the first surface and covered by a white solder resist,

a semiconductor chip provided on an upper side of the first surface of the wiring substrate,

a sealing resin covering the first surface of the wiring substrate and the semiconductor chip, and

an external terminal provided on the second surface of the wiring substrate, wherein

the wiring substrate being electrically connectable with a printed wiring board through the external terminal; and

a print wiring substrate including

a mounting substrate,

a wiring layer provided on an upper side of the mounting substrate and electrically connectable with the external terminal, and

an infrared absorption layer provided on an upper side of the wiring layer and formed of any of carbon black, carbon nanotube, diamond-like carbon, or insulation paste containing microcrystal diamond.

2. The semiconductor device according to claim 1 , wherein the infrared absorption layer is formed outside a region in which the semiconductor package is disposed on the print wiring substrate.

3. The semiconductor device according to claim 1 , wherein the external terminal is a solder ball.

4. The semiconductor device according to claim 1 , wherein the external terminal is a solder ball.

5. A semiconductor device comprising:

a semiconductor package including

a wiring substrate having a first surface and a second surface on a side opposite to the first surface,

a semiconductor chip provided on the first surface of the wiring substrate,

a sealing resin covering the first surface of the wiring substrate and surfaces of the semiconductor chip, and

an external terminal provided on the second surface of the wiring substrate; and

a print wiring substrate including

a mounting substrate,

a wiring layer provided on an upper side of the mounting substrate and electrically connectable with the external terminal, and

an infrared absorption layer provided on an upper side of the wiring layer and formed of any of carbon black, carbon nanotube, diamond-like carbon, or insulation paste containing microcrystal diamond, wherein

the wiring substrate is electrically connectable with the printed wiring board through the external terminal.

6. The print wiring substrate according to claim 5 , wherein the infrared absorption layer is formed outside a region in which the semiconductor package is disposed on the print wiring substrate.

7. The print wiring substrate according to claim 5 , wherein the external terminal is a solder ball.

Priority Claims (1)
JP 2020-046800 · Mar 17, 2020 · national
Continuity (2)
Continuation 17200411 · Mar 12, 2021
Related Publication 20240055370A1 · Feb 15, 2024
References Cited (13)
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