IP Library › Granted Patent US 12,432,931
Granted Patent B2
US 12,432,931 · App. 17/952,821 · Granted Sep 30, 2025

Memory cell including two selectors and method of making same

Inventors: Zhiqiang Wei (Pleasanton, CA); Zihui Wang (Mountain View, CA)
Assignee: Avalanche Technology, Inc.
H10B61/10H10N50/01
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Quick Facts
Patent No.
US 12,432,931
App. No.
17/952,821
Granted
Sep 30, 2025
Kind
B2
Abstract

The present invention is directed to a memory cell including first and second unidirectional selectors coupled in parallel to a nonvolatile memory element. Each of the first and second unidirectional selectors includes first, second, and third electrode layers; a first insulator layer interposed between the first and second electrode layers; and a second insulator layer interposed between the second and third electrode layers. The first insulator layer of the first unidirectional selector includes therein a permanent conductive path and the second insulator layer of the first unidirectional selector is operable to form therein a volatile conductive path upon application of a potential across the first unidirectional selector. The second insulator layer of the second unidirectional selector includes therein another permanent conductive path and the first insulator layer of the second unidirectional selector is operable to form therein another volatile conductive path upon application of another potential across the second selector.

Claims (23)

1. A memory cell including:

a nonvolatile memory element;

first and second unidirectional selectors coupled in parallel to the nonvolatile memory element, each of the first and second unidirectional selectors including:

first, second, and third electrode layers;

a first insulator layer interposed between the first and second electrode layers; and

a second insulator layer interposed between the second and third electrode layers,

wherein the first insulator layer of the first unidirectional selector includes therein a permanent conductive path and the second insulator layer of the first unidirectional selector is operable to form therein a volatile conductive path upon application of a potential across the first unidirectional selector,

wherein the second insulator layer of the second unidirectional selector includes therein another permanent conductive path and the first insulator layer of the second unidirectional selector is operable to form therein another volatile conductive path upon application of another potential across the second unidirectional selector, and

wherein the first and second insulator layers of the first unidirectional selector are coplanar with the first and second insulator layers of the second unidirectional selector, respectively.

2. The memory cell of claim 1 , wherein the first and second unidirectional selectors are configured to direct opposite currents, respectively.

3. The memory cell of claim 1 , wherein the first and second insulator layers of the first unidirectional selector comprise first and second oxides, respectively.

4. The memory cell of claim 3 , wherein the permanent conductive path in the first insulator layer of the first unidirectional selector includes a nonstoichiometric oxide filament with oxygen deficiency.

5. The memory cell of claim 3 , wherein each of the first and second oxides is stochiometric or near-stochiometric.

6. The memory cell of claim 3 , wherein each of the first and second oxides includes any one of hafnium oxide, tantalum oxide, zirconium oxide, titanium oxide, niobium oxide, or silicon oxide.

7. The memory cell of claim 1 , wherein the first and second insulator layers of the second unidirectional selector comprise first and second oxides, respectively.

8. The memory cell of claim 7 , wherein the another permanent conductive path in the second insulator layer of the second unidirectional selector includes a nonstoichiometric oxide filament with oxygen deficiency.

9. The memory cell of claim 7 , wherein each of the first and second oxides is stochiometric or near-stochiometric.

10. The memory cell of claim 7 , wherein each of the first and second oxides includes any one of hafnium oxide, tantalum oxide, zirconium oxide, titanium oxide, niobium oxide, or silicon oxide.

11. The memory cell of claim 1 , wherein each of the second electrode layer of the first unidirectional selector and the second electrode layer of the second unidirectional selector comprises any one of copper, silver, nickel, or cobalt.

12. The memory cell of claim 1 , wherein each of the second electrode layer of the first unidirectional selector and the second electrode layer of the second unidirectional selector has a composite structure including a plurality of conductive particles embedded in a semiconducting or insulating matrix.

13. The memory cell of claim 12 , wherein the plurality of conductive particles comprise any one of copper, silver, nickel, or cobalt.

14. The memory cell of claim 1 , wherein each of the first and third electrode layers of the first and second unidirectional selectors comprises any one of titanium nitride, iridium, platinum, or palladium.

15. The memory cell of claim 1 , wherein the nonvolatile memory element comprises a magnetic tunnel junction (MTJ).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2022
From: WEI, ZHIQIANG; WANG, ZIHUI
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 061215/0510 →
Continuity (2)
Provisional Application 63358227 · Jul 5, 2022
Related Publication 20240015986A1 · Jan 11, 2024
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