IP Library Granted Patent US 12,446,475
Granted Patent B2
US 12,446,475 · App. 17/712,300 · Granted Oct 14, 2025

Quantum device

Inventors: Katsumi Kikuchi (Tokyo, JP); Akira Miyata (Tokyo, JP); Takanori Nishi (Tokyo, JP); Kenji Nanba (Tokyo, JP); Ayami Yamaguchi (Tokyo, JP)
Assignee: NEC CORPORATION
H10N60/815
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Quick Facts
Patent No.
US 12,446,475
App. No.
17/712,300
Granted
Oct 14, 2025
Kind
B2
Abstract

A quantum device according to an example embodiment includes: a quantum chip with a first surface and a second surface located on a side opposite to the first surface, in the quantum chip, at least a part of a qubit circuit being provided on the second surface; a first interposer with a third surface and a fourth surface located on a side opposite to the third surface, the first interposer being connected to the quantum chip in such a manner that the second surface of the quantum chip is opposed to the third surface of the first interposer; and a second interposer with a fifth surface and a sixth surface located on a side opposite to the fifth surface, the second interposer being connected to the first interposer in such a manner that the fourth surface of the first interpose is opposed to the fifth surface of the second interposer.

Claims (19)

1. A quantum device comprising:

a quantum chip with a first surface and a second surface located on a side opposite to the first surface, in the quantum chip, at least a part of a qubit circuit being provided on the second surface;

a first interposer with a third surface and a fourth surface located on a side opposite to the third surface, the first interposer being connected to the quantum chip such that the second surface of the quantum chip is opposed to the third surface of the first interposer; and

a second interposer with a fifth surface and a sixth surface located on a side opposite to the fifth surface, the second interposer being connected to the first interposer such that the fourth surface of the first interposer is opposed to the fifth surface of the second interposer, wherein

the quantum chip is disposed inside a recessed part formed in a sample table having a cooling function, and

a part of at least one of the first interposer and the second interposer is in contact with the sample table.

2. The quantum device according to claim 1 , wherein at least a part of the first surface is in contact with an inner surface of the recessed part.

3. The quantum device according to claim 1 , wherein at least a part of the first surface is bonded or joined to an inner surface of the recessed part.

4. The quantum device according to of claim 1 , wherein the first surface is disposed with a space interposed between the first surface and an inner surface of the recessed part.

5. The quantum device according to claim 1 , wherein

the recessed part is formed in a predetermined surface of the sample table, and

a part of the third surface is in contact with the predetermined surface.

6. The quantum device according to claim 5 , wherein at least a part of one of a plurality of side surfaces of the first interposer is in contact with a plurality of holding members provided on the predetermined surface.

7. The quantum device according to claim 6 , wherein

the first interposer is rectangular as viewed in a direction perpendicular to the third surface, and

each of the plurality of holding members hold one of the plurality of side surfaces of the first interposer near a respective one of corners thereof with its planar part.

8. The quantum device according to claim 1 , wherein the sixth surface is in contact with a cooling member having a cooling function.

9. The quantum device according to claim 1 , wherein the first interposer comprises a first core material, and a thermal via penetrating the first core material from the third surface side to the fourth surface side.

10. The quantum device according to claim 9 , wherein the thermal via includes a tapered part of which a diameter on the fourth surface side is larger than that on the third surface side.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2022
From: KIKUCHI, KATSUMI; MIYATA, AKIRA; NISHI, TAKANORI; NANBA, KENJI; YAMAGUCHI, AYAMI
To: NEC CORPORATION
Reel/Frame 061912/0919 →
Priority Claims (1)
JP 2021-073684 · Apr 23, 2021 · national
Continuity (1)
Related Publication 20220344562A1 · Oct 27, 2022
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