Eddy current mitigation for on-chip inductors
An electronic device may include a transceiver with a substrate and an inductor on the substrate. A ring of ground traces may surround the inductor. Circuit components may be patterned onto the substrate overlapping the inductor, a region of the substrate surrounded by the inductor, and/or a region of the substrate between the inductor and the ring. The components may be arranged in trees with feed lines extending radially outward from a central axis. The components in each tree may be separated from the capacitors in other trees by gaps, preventing eddy currents on the trees. The components may be used to form bypass capacitors for power supply lines, a low-dropout regulator load, part of the loop filter of a phase-locked loop, or other portions of the transceiver. The components may thereby be used to convey signals while also meeting fill factor requirements associated with fabrication of the substrate.
1 . An integrated circuit comprising:
a substrate;
an inductor on the substrate;
a first tree of capacitors on the substrate and overlapping the inductor; and
a second tree of capacitors on the substrate and overlapping the inductor.
2 . The integrated circuit of claim 1 , wherein the inductor laterally surrounds a central area and wherein at least some of the capacitors in the first tree overlap the central area.
3 . The integrated circuit of claim 2 , further comprising:
a ground ring surrounding the inductor, wherein at least some of the capacitors in the first tree overlap an area of the substrate between the inductor and the ground ring.
4 . The integrated circuit of claim 1 , wherein the first tree of capacitors comprises:
drive lines; and
first branches of capacitors extending from a first side of the drive lines.
5 . The integrated circuit of claim 4 , wherein the first tree of capacitors further comprises:
second branches of capacitors extending from a second side of the drive lines opposite the first branches of capacitors.
6 . The integrated circuit of claim 5 , wherein the first tree of capacitors further comprises:
terminals coupled to the drive lines, wherein a number of capacitors in the first branches of capacitors decreases in a direction away from the terminals.
7 . The integrated circuit of claim 6 , wherein a number of capacitors in the second branches of capacitors decreases in the direction away from the terminals.
8 . The integrated circuit of claim 1 , wherein the first tree of capacitors extends towards a central axis of the inductor at a first angle relative to the central axis, the second tree of capacitors extending towards the central axis of the inductor at a second angle relative to the central axis, the second angle being different from the first angle.
9 . The integrated circuit of claim 8 , wherein the first tree of capacitors is non-overlapping with respect to the second tree of capacitors.
10 . Wireless circuitry comprising:
a substrate;
an inductor formed from conductive traces on the substrate, the conductive traces extending around a first region of the substrate;
a ground ring on the substrate and surrounding the inductor; and
a tree of capacitors on the substrate, wherein
the ground ring is laterally separated from the inductor by a second region of the substrate,
the tree of capacitors has first branches overlapping the first region, and
the tree of capacitors has second branches overlapping the second region.
11 . The wireless circuitry of claim 10 , wherein the capacitors in the tree are non-overlapping with respect to the conductive traces of the inductor.
12 . The wireless circuitry of claim 11 , further comprising:
an additional tree of capacitors on the substrate, wherein
the tree of capacitors extends at a first angle relative to a central axis of the inductor, and
the additional tree of capacitors extends at a second angle relative to the central axis of the inductor, the second angle being different from the first angle.
13 . The wireless circuitry of claim 12 , wherein the additional tree of capacitors has third branches overlapping the first region.
14 . The wireless circuitry of claim 13 , wherein the additional tree of capacitors has fourth branches overlapping the second region.
15 . The wireless circuitry of claim 14 , wherein the capacitors in the additional tree are non-overlapping with respect to the conductive traces of the inductor.
16 . The wireless circuitry of claim 10 , wherein the tree of capacitors has third branches overlapping the conductive traces of the inductor.
17 . The wireless circuitry of claim 16 , further comprising:
an additional tree of capacitors on the substrate, wherein
the tree of capacitors extends at a first angle relative to a central axis of the inductor,
the additional tree of capacitors extends at a second angle relative to the central axis of the inductor, the second angle being different from the first angle,
the additional tree of capacitors has fourth branches overlapping the first region,
the additional tree of capacitors has fifth branches overlapping the second region, and
the additional tree of capacitors has sixth branches overlapping the conductive traces of the inductor.
18 . Wireless circuitry comprising:
a substrate;
an inductor extending from a first terminal to a second terminal and laterally surrounding a region of the substrate; and
a tree of capacitors that includes drive lines and branches extending away from the drive lines, wherein
the drive lines extend between the first terminal and the second terminal of the inductor, and
the branches overlap the region of the substrate.
19 . The wireless circuitry of claim 18 , further comprising:
a ground ring on the substrate and surrounding the inductor, the ground ring being laterally separated from the inductor by an additional region of the substrate; and
an additional tree of capacitors that overlaps the additional region of the substrate, the capacitors in the additional tree being non-overlapping with respect to the first region of the substrate and with respect to conductive traces of the inductor.
20 . The wireless circuitry of claim 18 , wherein the inductor comprises at least one loop that extends from the first terminal to the second terminal and that laterally surrounds the region of the substrate, the first terminal is laterally separated from the second terminal by a gap, and the drive lines extend through the gap.