Hybrid wafer bonding method and structure thereof
A semiconductor structure includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first via structure in a first dielectric layer, the first via structure including a first contact via surface. At least a portion of the first via structure is in direct contact with the first dielectric layer. The second semiconductor structure includes a second via structure in a second dielectric layer, the second via structure including a second contact via surface. At least a portion of the second via structure is in direct contact with the second dielectric layer. The first contact via surface is bonded with the second contact via surface. The second contact via surface and the first contact via surface have an overlapping interface in the vertical direction. A first barrier layer is formed at a non-overlapping interface in the first contact via surface and the second contact via surface. The first barrier layer contains a multi-component oxide.
1 . A hybrid wafer bonding structure, comprising:
a first semiconductor structure including:
a first substrate, a first dielectric layer formed on the first substrate, and a first via structure formed in the first dielectric layer and on the first substrate, the first contact via having a first contact via surface;
a second semiconductor structure including:
a second substrate, a second dielectric layer formed on the second substrate, and a second via structure formed in the second dielectric layer and on the second substrate, the second contact via having a second contact via surface, wherein:
the first semiconductor structure is bonded with the second semiconductor structure, the first contact via surface is attached with the second contact via surface, and the second contact via surface and the first contact via surface have different surface areas and have an overlapped interface; and
a self-barrier layer, formed on a non-overlapped surface of one or more of the first and second contact via surfaces at a bonding interface between the first and second semiconductor structures, wherein the self-barrier layer contains a multi-component oxide,
wherein a contact hole in the first dielectric layer includes a first groove on the first substrate and a first trench connected to and on the first groove,
a barrier layer is on an inner surface of the contact hole and a seed layer is on the barrier layer, and
first metal impurity-doped copper is over the seed layer and in the contact hole to form the first via structure, and the first via structure includes a first switch element in the first groove and a first contact via on the first switch element.
2 . The hybrid wafer bonding structure according to claim 1 , wherein:
each of the first dielectric layer and the second dielectric layer includes silicon oxide, and
the multi-component oxide containing Si, O, and at least one of Al, Mn, or Ag.
3 . The hybrid wafer bonding structure according to claim 2 , wherein:
the multi-component oxide is silicon aluminum oxide.
4 . The hybrid wafer bonding structure according to claim 1 , wherein:
an orthogonal projection of one of the second contact via surface and the first contact via surface on the bonding interface completely covers an orthogonal projection of another of the second contact via surface and the first contact via surface.
5 . The hybrid wafer bonding structure according to claim 1 , wherein:
a barrier film is formed between the first substrate and the first dielectric layer.
6 . The hybrid wafer bonding structure according to claim 5 , wherein the first switch element penetrates the barrier film.
7 . The hybrid wafer bonding structure according to claim 5 , wherein the first the barrier film includes silicon nitride.
8 . The hybrid wafer bonding structure according to claim 5 , wherein the first the barrier film includes nitrogen-doped silicon carbide.
9 . The hybrid wafer bonding structure according to claim 1 , wherein:
the first semiconductor structure further includes a conductive layer in the first substrate,
the first switch element is formed on the conductive layer, and
an orthogonal projection of the first via on the first substrate is greater than an orthogonal projection of the first switch element on the first substrate.
10 . The hybrid wafer bonding structure according to claim 9 , wherein:
the first semiconductor structure further includes an insulating layer in the first substrate, and the conductive layer is surrounded by the insulating layer.
11 . The hybrid wafer bonding structure according to claim 1 , wherein:
the barrier layer on the inner surface of the contact hole contains Ti, Ta, TiN, TaN, TiSiN, or any combination thereof.
12 . The hybrid wafer bonding structure according to claim 1 , wherein the first contact via surface of the first contact via is circular, and the second contact via surface of the second contact via is circular.
13 . The hybrid wafer bonding structure according to claim 12 , wherein the first contact via surface and the second contact via surface are concentric at the bonding interface.
14 . The hybrid wafer bonding structure according to claim 12 , wherein the first contact via surface and the second contact via surface are non-concentric at the bonding interface.
15 . The hybrid wafer bonding structure according to claim 1 , wherein the metal impurity includes aluminum (Al).
16 . The hybrid wafer bonding structure according to claim 1 , wherein the metal impurity includes manganese (Mn).
17 . The hybrid wafer bonding structure according to claim 1 , wherein the metal impurity includes silver (Ag).