IP Library › Granted Patent US 12,470,141
Granted Patent B2
US 12,470,141 · App. 18/065,552 · Granted Nov 11, 2025

Inductor flux control circuits

Inventors: David Lidsky (Oakland, CA); Timothy Alan Phillips (Hope, RI); Parag Oak (Sunnyvale, CA)
Assignee: Empower Semiconductor, Inc.
H02M3/157H02M1/0025H02M1/0095H02M3/07
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Quick Facts
Patent No.
US 12,470,141
App. No.
18/065,552
Granted
Nov 11, 2025
Kind
B2
Abstract

A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) prefluxing the inductor then charging the capacitor causing an increased current to flow in the inductor and (2) prefluxing the inductor then discharging the capacitor causing increased current to flow in the inductor. The inductor prefluxing steps enable the circuit to provide increased output voltage and/or increased output current.

Claims (20)

1 . A flux control circuit for an inductor comprising:

a capacitor bank having a plurality of capacitors;

a fixed current source arranged to supply a fixed level of current to the capacitor bank;

a variable current source controlled by a variable feedback signal that is an output of a preflux tuning algorithm and arranged to supply a variable level of current to the capacitor bank, and wherein the capacitor bank is directly coupled to the fixed and variable current sources; and

a controller having a variable timer, wherein the controller is arranged to control supplying a current to the inductor for a duration of time that is controlled by the variable timer, and wherein the variable timer controls the supplying of the variable level of current by the variable current source to the capacitor bank.

2 . The flux control circuit of claim 1 , wherein the capacitor bank is a switched capacitor bank and is arranged to be programmed to activate a specific number of capacitors using most significant bits (MSB) of a digital to analog conversion (DAC) code that represents a target voltage at an output terminal of the inductor.

3 . The flux control circuit of claim 1 , wherein the controller comprises a sample and hold circuit having a set point that is substantially equal to a voltage at an output terminal of the inductor.

4 . The flux control circuit of claim 3 , wherein the sample and hold circuit is coupled to a comparator.

5 . The flux control circuit of claim 4 , wherein the sample and hold circuit is arranged to sample an output voltage of the capacitor bank, and wherein the comparator is arranged to receive the sampled output voltage of the capacitor bank and compare it to the voltage at the output terminal of the inductor.

6 . The flux control circuit of claim 5 , wherein the sample and hold circuit and the comparator, in combination, are arranged to stop supplying current to the inductor when the output voltage of the capacitor bank is equal to the voltage at the output terminal of the inductor.

7 . A method of controlling flux for an inductor, the method comprising:

providing a capacitor bank having a plurality of capacitors;

supplying, by a fixed current source, a fixed level of current to the capacitor bank;

supplying, by a variable current source, a variable level of current to the capacitor bank, wherein the variable current source is controlled by a variable feedback signal that is an output of a preflux tuning algorithm and directly coupled to the fixed and variable current sources; and

controlling, by a controller having a variable timer, supplying of a current to the inductor for a duration of time that is controlled by the variable timer, wherein the variable timer controls the supplying of the variable level of current by the variable current source to the capacitor bank.

8 . The method of claim 7 , further comprising programming the capacitor bank to activate a specific number of capacitors using most significant bits (MSB) of a digital to analog conversion (DAC) code that represents a target voltage at an output terminal of the inductor.

9 . The method of claim 7 , wherein the controller comprises a sample and hold circuit having a set point that is substantially equal to a voltage at an output terminal of the inductor.

10 . The method of claim 9 , wherein the sample and hold circuit is coupled to a comparator.

11 . The method of claim 10 , further comprising sampling an output voltage of the capacitor bank, by the sample and hold circuit, and transmitting the sampled output voltage of the capacitor bank to the comparator and comparing the sampled output voltage to the voltage at the output terminal of the inductor, by the comparator.

12 . The method of claim 11 , further comprising stopping supplying current to the inductor when the output voltage of the capacitor bank is equal to the voltage at the output terminal of the inductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2023
From: LIDSKY, DAVID; PHILLIPS, TIMOTHY ALAN; OAK, PARAG
To: EMPOWER SEMICONDUCTOR, INC.
Reel/Frame 064019/0504 →
Continuity (5)
Division 16513473 · Jul 16, 2019
Continuation 15689698 · Aug 29, 2017
Continuation 15046145 · Feb 17, 2016
Continuation In Part 14635853 · Mar 2, 2015
Related Publication 20230114632A1 · Apr 13, 2023
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