IP Library › Granted Patent US 12,471,353
Granted Patent B2
US 12,471,353 · App. 18/759,037 · Granted Nov 11, 2025

Gate-all around transistor with isolating feature under source/drain

Inventors: Yu-Xuan Huang (Hsinchu, TW); Ching-Wei Tsai (Hsinchu, TW); Hou-Yu Chen (Zhubei, TW); Kuan-Lun Cheng (Hsin-chu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D84/0158H10D62/119H10D84/038
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Quick Facts
Patent No.
US 12,471,353
App. No.
18/759,037
Granted
Nov 11, 2025
Kind
B2
Abstract

Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes semiconductor material layers stacked above a substrate along a first direction and a gate structure wrapping around the semiconductor material layers. The semiconductor structure further includes an epitaxial structure coupled to the semiconductor material layers in a second direction that is different from the first direction and a SiGe-containing layer located below the epitaxial structure. In addition, a material of the SiGe-containing layer is different from a material of the epitaxial structure, the SiGe-containing layer comprises a first portion with a first thickness in the first direction, and a second portion with a second thickness in the first direction, and the second thickness is smaller than the first thickness.

Claims (48)

1 . A semiconductor structure, comprising:

semiconductor material layers stacked above a substrate along a first direction;

a gate structure wrapping around the semiconductor material layers;

an epitaxial structure coupled to the semiconductor material layers in a second direction that is different from the first direction; and

a SiGe-containing layer located below the epitaxial structure, wherein:

a material of the SiGe-containing layer is different from a material of the epitaxial structure,

the SiGe-containing layer comprises a first portion with a first thickness in the first direction, and a second portion with a second thickness in the first direction, and the second thickness is smaller than the first thickness, and

the SiGe-containing layer is partially sandwiched between the epitaxial structure and the gate structure in the second direction.

2 . The semiconductor structure as claimed in claim 1 , wherein the SiGe-containing layer has a curved bottom surface.

3 . The semiconductor structure as claimed in claim 1 , wherein the gate structure has a top portion over the semiconductor material layers and a bottom portion under the semiconductor material layers, and a dimension of the top portion of the gate structure is different from a dimension of the bottom portion of the gate structure in the second direction.

4 . The semiconductor structure as claimed in claim 3 , wherein the dimension of the top portion of the gate structure is smaller than the dimension of the bottom portion of the gate structure in the second direction.

5 . The semiconductor structure as claimed in claim 1 , wherein the SiGe-containing layer is separated from the semiconductor material layers.

6 . The semiconductor structure as claimed in claim 1 , wherein a curved interface is between the SiGe-containing layer and the epitaxial structure.

7 . The semiconductor structure as claimed in claim 1 , further comprising:

a dielectric structure covering a sidewall of the SiGe-containing layer.

8 . The semiconductor structure as claimed in claim 1 , wherein a width of the epitaxial structure is greater than a width of the SiGe-containing layer in a cross-sectional view.

9 . A semiconductor structure, comprising:

a substrate;

epitaxial structures over the substrate;

semiconductor material layers laterally extending between the epitaxial structures;

a gate structure wrapping around the semiconductor material layers;

semiconductor features under the epitaxial structures, wherein the semiconductor features comprise a material different from a material of the epitaxial structures, and an interface between the semiconductor features and the epitaxial structures is lower than the semiconductor material layers; and

fin spacers covering opposite sides of the semiconductor features and vertically under the epitaxial structures.

10 . The semiconductor structure as claimed in claim 9 , further comprising:

a base structure protruding from the substrate and under the semiconductor material layers, wherein a curved interface is in between the base structure and the semiconductor features.

11 . The semiconductor structure as claimed in claim 9 , wherein at least one of the semiconductor material layers has a sloped sidewall.

12 . The semiconductor structure as claimed in claim 9 , wherein the semiconductor material layers comprise:

a bottom semiconductor material layer;

a middle semiconductor material layer over the bottom semiconductor material layer; and

a top semiconductor material layer over the middle semiconductor material layer,

wherein the bottom semiconductor material layer is wider than the middle semiconductor material layer in a cross-sectional view.

13 . The semiconductor structure as claimed in claim 12 , wherein the middle semiconductor material layer is wider than the top semiconductor material layer in the cross-sectional view.

14 . A semiconductor structure, comprising:

a substrate;

semiconductor material layers stacked along a first direction over the substrate and spaced apart from each other;

a gate structure wrapping around the semiconductor material layers;

an epitaxial structure coupled to the semiconductor material layers in a second direction different from the first direction; and

a semiconductor feature under the epitaxial structure, wherein the semiconductor feature has a bottom surface that is lower than a top surface of the semiconductor material layers, and the bottom surface of the semiconductor feature has a curved shape in a cross-sectional view in a third direction that is different from the first direction and the second direction.

15 . The semiconductor structure as claimed in claim 14 , wherein the semiconductor feature is made of SiGe and the epitaxial structure is made of SiP.

16 . The semiconductor structure as claimed in claim 14 , further comprising:

dielectric features separated with each other in the first direction, wherein at least one of the dielectric features is in contact with the semiconductor feature.

17 . The semiconductor structure as claimed in claim 14 , wherein the semiconductor material layers comprise varying widths.

18 . The semiconductor structure as claimed in claim 14 , further comprising:

base structure protruding from the substrate and extending in the second direction; and

an isolation structure around the base structure,

wherein the gate structure extends in the third direction and covers the isolation structure in the first direction.

19 . The semiconductor structure as claimed in claim 18 , wherein the base structure has slope sidewalls in the cross-sectional view in the third direction.

20 . The semiconductor structure as claimed in claim 19 , wherein the semiconductor feature intersects with the slope sidewalls of the base structures.

Continuity (4)
Continuation 17870451 · Jul 21, 2022
Continuation 17082711 · Oct 28, 2020
Provisional Application 62953715 · Dec 26, 2019
Related Publication 20240355928A1 · Oct 24, 2024
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