IP Library › Granted Patent US 12,489,064
Granted Patent B2
US 12,489,064 · App. 18/099,715 · Granted Dec 2, 2025

Method for forming mark, packaging method of semiconductor device, and semiconductor device having the mark

Inventors: Shih-Wei Chen (Hsinchu, TW); Po-Yuan Teng (Hsinchu, TW); Chiahung Liu (Hsinchu, TW); Hao-Yi Tsai (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/544H01L21/56H01L23/3128H10B80/00H01L2223/54406H01L2223/54413H01L2223/5442H01L2223/54433
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,489,064
App. No.
18/099,715
Granted
Dec 2, 2025
Kind
B2
Abstract

The present disclosure relates to a method for forming a mark, a packaging method for a semiconductor device, and a semiconductor device having the mark, wherein the marking material is a polymer compound and the light transmittance of the marking material is less than 50%, which is suitable for forming the mark on the semiconductor device by laser sintering, and the marking material is sintered to make the resin cross-link and cure to form a cured product. In addition, in one embodiment, the cured product formed by the marking material can be used as a deflector to guide the flow of the underfill and control the flow rate of underfill, so as to effectively solve the problem of uneven flow rate of the underfill.

Claims (28)

1 . A method of forming a mark, comprising:

providing a semiconductor device, wherein the semiconductor device comprises an interposer, a first redistribution structure, a second redistribution structure and a through hole structure, the first redistribution structure is located on a first side of the interposer, the second redistribution structure is located on a second side of the interposer, the first side is opposite to the second side, and the through hole structure passes through the interposer and connects with the first redistribution structure and the second redistribution structure;

forming a marking material on the first redistribution structure, the marking material comprising a resin, a curing agent, fillers and a solvent; and

sintering the marking material to make the resin cross-link and cure to form a cured product protruding from the first redistribution structure.

2 . The method according to claim 1 , further comprising removing a remaining part of the marking material that has not been sintered.

3 . The method according to claim 2 , wherein removing the remaining part of the marking material comprises cleaning the remaining part with a scrubber.

4 . The method according to claim 1 , wherein the cured product has a height of 5 to 100 microns.

5 . The method according to claim 1 , wherein a light transmittance of the cured product is less than 50%.

6 . The method according to claim 1 , wherein the cured product has a top surface and a bottom surface, and the top surface and the bottom surface have different sizes.

7 . A packaging method for a semiconductor device, comprising:

providing a first semiconductor device and a second semiconductor device, wherein the second semiconductor device is disposed over the first semiconductor device, and a plurality of conductive bumps and at least one deflector are disposed between the first semiconductor device and the second semiconductor device; and

injecting an underfill between the first semiconductor device and the second semiconductor device, and the underfill covers the conductive bumps and the at least one deflector,

wherein the at least one deflector contains a marking material, the marking material comprises a resin, a curing agent, fillers and a solvent, and the marking material is sintered to make the resin cross-link and cure to form a cured product protruding from the first semiconductor device.

8 . The packaging method according to claim 7 , wherein the at least one deflector is disposed in an area surrounded by the conductive bumps.

9 . The packaging method according to claim 7 , wherein the at least one deflector is disposed in an outer area outside an area surrounded by the conductive bumps.

10 . The packaging method according to claim 7 , wherein a shape of the at least one deflector is circular, elongated or L-shaped.

11 . The packaging method according to claim 7 , wherein a number of the at least one deflector is plurality, and the deflectors has a different height.

12 . The packaging method according to claim 7 , wherein a number of the at least one deflector is plurality, and widths between two adjacent deflectors are different.

13 . A semiconductor device, comprising:

an integrated circuit chip having a package side and a back side opposite to the package side, and a plurality of soldering materials are provided on the package side; and

a cured product disposed on the integrated circuit chip, the cured product contains a marking material, the marking material comprises a resin, a curing agent, fillers and a solvent, and the marking material is sintered to make the resin cross-link and cure to form the cured product protruding from the integrated circuit chip.

14 . The semiconductor device according to claim 13 , further comprising a backside enhance layer, the backside enhance layer is disposed over the backside, and the backside enhance layer is a polymer compound containing epoxy resin.

15 . The semiconductor device according to claim 14 , wherein the cured product is a polymer compound containing epoxy resin, and is formed over the backside enhance layer.

16 . The semiconductor device according to claim 13 , further comprising a package element, the package element is disposed over the backside of the integrated circuit chip, and the cured product is disposed on the package element.

17 . The semiconductor device according to claim 13 , further comprising a package element, the package element is disposed on the backside of the integrated circuit chip, and the curing product is disposed between the package element and the integrated circuit chip.

18 . The semiconductor device according to claim 13 , wherein the semiconductor device further comprises an underfill, the underfill is injected between the package element and the integrated circuit chip.

19 . The semiconductor device according to claim 18 , wherein the curing product acts as a deflector for guiding a flow of the underfill.

20 . The semiconductor device according to claim 13 , further comprises a plurality of conductive bumps arranged between the semiconductor device and the package element, and the cured product is disposed in an area surrounded by the conductive bumps or an outer area outside the area surrounded by the conductive bumps.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE EXECUTION DATES FOR ALL INVENTOR PREVIOUSLY RECORDED AT REEL: 063311 FRAME: 0220. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 2, 2024
From: CHEN, SHIH-WEI; TENG, PO-YUAN; LIU, CHIAHUNG; TSAI, HAO-YI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 066176/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: CHEN, SHIH-WEI; TENG, PO-YUAN; LIU, CHIAHUNG; TSAI, HAO-YI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 063311/0220 →
Continuity (2)
Provisional Application 63428907 · Nov 30, 2022
Related Publication 20240178152A1 · May 30, 2024
References Cited (6)
US 5669995A · Hong · 1997 [cited by examiner]
US 6168207B1 · Nishizawa · 2001 [cited by examiner]
US 20020036235A1 · Kudo · 2002 [cited by examiner]
US 20110219964A1 · Chen · 2011 [cited by examiner]
US 20140017822A1 · Sakai · 2014 [cited by examiner]
US 20160264792A1 · Jauzein · 2016 [cited by examiner]