Semiconductor device
View Patent ↗One of the semiconductor devices includes a semiconductor substrate, a passivation layer and a conductive pattern. The semiconductor substrate includes a conductive pad thereover. The passivation layer over the semiconductor substrate. The conductive pattern is penetrating through the passivation layer and electrically connected to the conductive pad, wherein a sidewall of the conductive pattern interfacing with the passivation layer and the conductive pad has at least one turning point.
1 . A semiconductor device, comprising:
a semiconductor substrate, comprising a conductive pad thereover;
a passivation layer over the semiconductor substrate; and
a conductive pattern, penetrating through the passivation layer and electrically connected to the conductive pad, wherein a sidewall of the conductive pattern interfacing with the passivation layer and the conductive pad has a first turning point, and a height of the first turning point is at a lower level with respect to an interface of the passivation layer and the conductive pad.
2 . The semiconductor device as claimed in claim 1 , wherein the sidewall of the conductive pattern further comprises a second turning point, and a height of the second turning point is substantially at a same level with the interface of the passivation layer and the conductive pad.
3 . The semiconductor device as claimed in claim 1 , wherein the sidewall of the conductive pattern is in direct contact with the passivation layer.
4 . The semiconductor device as claimed in claim 1 , wherein a width of the conductive pattern decreases along a direction from the first turning point to the semiconductor substrate.
5 . The semiconductor device as claimed in claim 1 , wherein a width of the conductive pad increases along a direction from the first turning point to the semiconductor substrate.
6 . The semiconductor device as claimed in claim 1 , wherein the sidewall of the conductive pattern further comprises a second turning point, and a height of the second turning point is substantially the same as a top of the conductive pad.
7 . The semiconductor device as claimed in claim 1 , wherein the height of the first turning point is lower than a height of a top of the conductive pad.
8 . A semiconductor device, comprising:
a semiconductor substrate, comprising a conductive pad thereover;
a passivation layer over the semiconductor substrate; and
a conductive pattern, penetrating through the passivation layer and electrically connected to the conductive pad, wherein a sidewall of the conductive pattern interfacing with the passivation layer and the conductive pad has at least one turning point, and a height of the at least one turning point is lower than a height of a top of the conductive pad.
9 . The semiconductor device as claimed in claim 8 , wherein the conductive pattern is electrically connected to an under bump metallization layer.
10 . The semiconductor device as claimed in claim 8 , wherein the conductive pad has a concave surface interfacing with the conductive pattern.
11 . The semiconductor device as claimed in claim 10 , wherein the conductive pattern has a concave surface conformal to the concave surface of the conductive pad.
12 . The semiconductor device as claimed in claim 10 , wherein the concave surface of the conductive pad is lower than the height of the top of the conductive pad.
13 . The semiconductor device as claimed in claim 8 , wherein the top of the conductive pad interfaces with the passivation layer.
14 . The semiconductor device as claimed in claim 1 , wherein the sidewall of the conductive pattern further comprises a second turning point, and a height of the-second turning point is lower than the height of the first turning point.
15 . The semiconductor device as claimed in claim 1 , wherein the sidewall of the conductive pattern further comprises a second turning point, and a height of the-second turning point is higher than the height of the first turning point.
16 . The semiconductor device as claimed in claim 8 , wherein the at least one turning point comprises a plurality of turning points at different heights.
17 . The semiconductor device as claimed in claim 8 , wherein the passivation layer comprises a first layer and a second layer on the first layer, and a sidewall of the first layer interfacing with the conductive pattern is substantially flush with a sidewall of the second layer interfacing with the conductive pattern.
18 . The semiconductor device as claimed in claim 8 , wherein the conductive pad has a first surface facing the semiconductor substrate and a second surface opposite to the first surface, and the passivation layer covers a portion of the second surface of the conductive pad.
19 . The semiconductor device as claimed in claim 8 , further comprising an interconnect structure between the semiconductor substrate and the conductive pad, wherein the conductive pad is electrically connected to the interconnect structure.
20 . The semiconductor device as claimed in claim 8 , wherein the passivation layer has a first surface facing the semiconductor substrate and a second surface opposite to the first surface, and the conductive pattern covers a portion of the second surface.