Nonvolatile memory device and operation method thereof, and storage device including the same
View Patent ↗A nonvolatile memory device that includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array; a status data memory circuit storing a first plurality of status data items; a control logic circuit controlling the status data memory circuit to accumulate the first plurality of status data items in the page buffer circuit, in response to a first status data group read command provided from an external device; and an input/output circuit outputting the first plurality of status data items accumulated in the page buffer circuit to the external device.
1 . A nonvolatile memory device, comprising:
a memory cell array including a plurality of nonvolatile memory cells;
a page buffer circuit connected to the memory cell array;
a status data memory circuit configured to store a first plurality of status data items;
a control logic circuit configured to control the status data memory circuit to accumulate the first plurality of status data items in the page buffer circuit, in response to a first status data group read command provided from an external device; and
an input/output circuit configured to output the first plurality of status data items accumulated in the page buffer circuit to the external device.
2 . The nonvolatile memory device of claim 1 , wherein the status data memory circuit is a volatile memory circuit outside the memory cell array.
3 . The nonvolatile memory device of claim 1 , wherein the input/output circuit is configured to continuously output the first plurality of status data items to the external device.
4 . The nonvolatile memory device of claim 1 , wherein the control logic circuit is configured to
store a plurality of status data item lists corresponding to different status data group read command types, and
determine one or more status data items to be accumulated in the page buffer circuit, based on the plurality of status data item lists.
5 . The nonvolatile memory device of claim 4 , wherein among the plurality of status data item lists
a first status data item list corresponding to a first status data group read command type of the first status data group read command includes the first plurality of status data items, and
a second status data item list corresponding to a second status data group read command type for a second status data group read command includes a second plurality of status data items.
6 . The nonvolatile memory device of claim 5 , wherein
the control logic circuit is configured to
identify the second status data group read command type of the second status data group read command provided from the external device, and
control the status data memory circuit to accumulate the second plurality of status data items in the page buffer circuit, in response to the identified second status data group read command type, and
the input/output circuit is configured to
output the second plurality of status data items accumulated in the page buffer circuit to the external device.
7 . The nonvolatile memory device of claim 1 , wherein
between a first time point when the first status data group read command is received and a second time point when the first plurality of status data items start to be output to the external device, a first number of times that a ready-busy signal indicating an operating status of the nonvolatile memory device to the external device transitions to logic low is less than a second number of the first plurality of status data items.
8 . The nonvolatile memory device of claim 7 , wherein the first number is one.
9 . The nonvolatile memory device of claim 1 , wherein the first plurality of status data items include a plurality of status data values corresponding to different status data attributes.
10 . A storage device comprising:
a storage controller including
a processing circuit configured to issue a status data group read request, and
a nonvolatile memory interface circuit configured to issue a status data group read command in response to the status data group read request; and
a nonvolatile memory device configured to continuously provide a plurality of status data items to the nonvolatile memory interface circuit, in response to the status data group read command.
11 . The storage device of claim 10 , wherein
the storage controller further includes a volatile memory device, and
the nonvolatile memory interface circuit is configured to store the plurality of status data items in the volatile memory device.
12 . The storage device of claim 11 , wherein the nonvolatile memory interface circuit is configured to transmit a completion of the status data group read request to the processing circuit, after the nonvolatile memory interface circuit stores the plurality of status data items in the volatile memory device.
13 . The storage device of claim 11 , wherein the processing circuit is configured to issue the status data group read request at a second time point after a first time point when a sudden power off (SPO) occurs on the storage device.
14 . The storage device of claim 13 , wherein
the nonvolatile memory interface circuit is configured to provide a program command for temporary data stored in the volatile memory device to the nonvolatile memory device at a third time point between the first time point and the second time point, and
the nonvolatile memory device is configured to transmit a status read value notifying program failure for the temporary data at a fourth time point between the second time point and the third time point.
15 . The storage device of claim 10 , wherein the processing circuit is configured to issue the status data group read request in response to a telemetry command provided from an external device.
16 . The storage device of claim 15 , wherein the storage controller further includes a host interface circuit configured to transmit the plurality of status data items to the external device.
17 . The storage device of claim 10 , wherein the nonvolatile memory device comprises:
a page buffer circuit;
a status data memory circuit configured to store the plurality of status data items;
a control logic circuit configured to control the status data memory circuit to accumulate the plurality of status data items in the page buffer circuit, in response to the status data group read command; and
an input/output circuit configured to continuously output the plurality of status data items accumulated in the page buffer circuit to the nonvolatile memory interface circuit.
18 . The storage device of claim 10 , wherein
the nonvolatile memory device is configured to receive the status data group read command based on a command latch enable signal, and
the nonvolatile memory interface circuit is configured to output the command latch enable signal that is logic low during a first time period when the plurality of status data items are sequentially provided from the nonvolatile memory device.
19 . An operation method of a nonvolatile memory device including a page buffer circuit connected to a volatile memory circuit and a nonvolatile memory cell array, the operation method comprising:
receiving a status data group read command from an external device;
accumulating a first plurality of status data items stored in the volatile memory circuit to the page buffer circuit based on the status data group read command; and
outputting the first plurality of status data items accumulated in the page buffer circuit to the external device.
20 . The operation method of claim 19 , wherein the accumulating comprises:
identifying the first plurality of status data items corresponding to the status data group read command from among a plurality of status data items stored in the volatile memory circuit; and
accumulating the identified first plurality of status data items in the page buffer circuit.