IP Library Granted Patent US 12,518,930
Granted Patent B2
US 12,518,930 · App. 18/093,842 · Granted Jan 6, 2026

Multilayer ceramic capacitor including SiO2 film on surfaces thereof

Inventor: Satoshi Muramatsu (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G4/30H01G4/008H01G4/012H01G4/224
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Quick Facts
Patent No.
US 12,518,930
App. No.
18/093,842
Granted
Jan 6, 2026
Kind
B2
Abstract

A multilayer ceramic capacitor includes a capacitive element including ceramic layers, first and second internal electrodes, first and second main surfaces, end surfaces, and side surfaces. A portion of the first and second side surfaces, and a portion of the first and second end surfaces include SiO 2 films. The SiO 2 films on the first and second side surfaces cover the first and second internal electrodes, respectively exposed on the first and second side surfaces. First and second external electrodes are respectively provided at least on an outer surface of the first end surface on which the SiO 2 film is not provided and an outer surface of the SiO 2 film provided on the first end surface and on at least on an outer surface of the second end surface on which the SiO 2 film is not provided and an outer surface of the SiO 2 film provided on the second end surface.

Claims (24)

1 . A multilayer ceramic capacitor comprising:

a capacitive element including first and second main surfaces opposed to each other in a height direction, first and second end surfaces opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction, and first and second side surfaces opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction and the length direction;

SiO 2 films provided on the capacitive element;

first and second external electrodes provided on the capacitive element and the SiO 2 films; and

first and second internal electrodes provided inside of the capacitive element; wherein

the first internal electrodes are exposed on the first side surface, the second side surface, and the first end surface;

the SiO 2 films directly cover the first internal electrodes on the first side surface, the second side surface, and the first end surface;

the first external electrode is directly connected to the first internal electrodes on the first end surface;

the second internal electrodes are exposed on the first side surface, the second side surface, and the second end surface;

the SiO 2 films directly cover the second internal electrodes on the first side surface, the second side surface, and the second end surface;

the second external electrode is directly connected to the second internal electrodes on the second end surface;

the SiO 2 films directly covering the internal electrodes exposed on the side surfaces and the SiO 2 films directly covering the internal electrodes exposed on the end surfaces are directly connected on the first and second main surfaces, the first and second end surfaces, and the first and second side surfaces of the capacitive element; and

a height in the length direction of a central region of the first and second end surfaces is higher than a height in the length direction of an outer region of the first and second end surfaces, and the SiO 2 films on the first and second end surfaces are thicker in the outer region than in the central region.

2 . The multilayer ceramic capacitor according to claim 1 , wherein the SiO 2 films are provided entirely or substantially entirely on the first side surface and entirely or substantially entirely on the second side surface.

3 . The multilayer ceramic capacitor according to claim 1 , wherein the SiO 2 films are provided entirely or substantially entirely on the first main surface and entirely or substantially entirely on the second main surface.

4 . The multilayer ceramic capacitor according to claim 1 , wherein, when at least one of the first external electrode or the second external electrode are removed and at least one of the first end surface or the second end surface are viewed, the SiO 2 film is annularly provided on the at least one of the first end surface or the second end surface.

5 . The multilayer ceramic capacitor according to claim 1 , wherein a maximum thickness of the SiO 2 film provided on the first side surface and the SiO 2 film provided on the second side surface is greater than or equal to about 1 μm and less than or equal to about 5 μm.

6 . The multilayer ceramic capacitor according to claim 1 , wherein a TiO 2 film is provided on at least a portion of outer surfaces of the SiO 2 films.

7 . The multilayer ceramic capacitor according to claim 1 , wherein at least a single-layer plating layer is provided on an outer surface of the first external electrode and an outer surface of the second external electrode.

8 . The multilayer ceramic capacitor according to claim 1 , wherein

the first internal electrodes include end portions that are continuously exposed on the first side surface and the first end surface, and on the second side surface and the first end surface;

the second internal electrodes include end portions that are continuously exposed on the first side surface and the second end surface, and on the second side surface and the second end surface; and

the SiO 2 films directly cover at least one of the end portions of the first and second internal electrodes.

9 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of the SiO 2 films on the first and second end surfaces increases along the height direction toward the first and second main surfaces.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2023
From: MURAMATSU, SATOSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 062290/0803 →
Priority Claims (1)
JP 2022-021676 · Feb 15, 2022 · national
Continuity (1)
Related Publication 20230260710A1 · Aug 17, 2023
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