IP Library › Granted Patent US 12,538,562
Granted Patent B2
US 12,538,562 · App. 18/514,661 · Granted Jan 27, 2026

Method of manufacturing a semiconductor device including depositing and etching a liner multiple times

Inventors: Shu-Uei Jang (Hsinchu, TW); Chen-Huang Huang (Hsinchu, TW); Ryan Chia-Jen Chen (Hsinchu, TW); Shiang-Bau Wang (Pingzchen, TW); Shu-Yuan Ku (Zhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H10D84/038H01L21/0337H01L21/3086H01L21/76224H10D30/024H10D30/62H10D64/015H10D64/017H10D84/0135H10D84/0147H10D84/0158H10D84/834
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Quick Facts
Patent No.
US 12,538,562
App. No.
18/514,661
Granted
Jan 27, 2026
Kind
B2
Abstract

A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.

Claims (43)

1 . A method of manufacturing a semiconductor device, the method comprising:

forming an opening in a layer over a conductive gate over a semiconductor fin;

performing a first process, the first process comprising:

depositing a liner at least partially within the opening;

etching through a bottom of the liner; and

etching through an underlying portion of the conductive gate;

repeating the first process one or more times;

removing an oxide from a sidewall of the conductive gate after the repeating the first process;

after the removing the oxide, removing spacers from adjacent to the conductive gate to form a void; and

capping the void to form air spacers.

2 . The method of claim 1 , wherein the depositing the liner deposits silicon nitride.

3 . The method of claim 2 , wherein the depositing the liner deposits the liner to a thickness of between 3 nm and 7 nm.

4 . The method of claim 1 , further comprising depositing a fill material after the removing the oxide.

5 . The method of claim 4 , wherein the depositing the fill material deposits silicon nitride.

6 . The method of claim 4 , wherein the depositing the fill material deposits silicon carbon nitride.

7 . The method of claim 1 , wherein the capping the void deposits silicon nitride.

8 . A method of manufacturing a semiconductor device, the method comprising:

forming an opening in a layer over a conductive gate over a semiconductor fin;

depositing a liner to line the opening;

removing a bottom of the liner; and

reconstituting the liner after the removing the bottom of the liner;

etching through an underlying portion of the conductive gate;

repeating the depositing, the removing, the reconstituting, and the etching one or more times;

decomposing to N 2 , H 2 O, SiF 4 , and NH 3 a remaining portion of the liner after the repeating the first process; and

after the decomposing, forming capped air spacers adjacent to the conductive gate.

9 . The method of claim 8 , wherein during at least part of the decomposing the remaining portion of the liner comprises (NH 4 ) 2 SiF 6 .

10 . The method of claim 9 , wherein the decomposing further comprises introducing HF and NH 3 to an oxide.

11 . The method of claim 10 , wherein the decomposing further comprises heating the (NH 4 ) 2 SiF 6 to a temperature of between 80° C. to 200° C.

12 . The method of claim 9 , wherein the decomposing is performed at least in part at a temperature of between 80° C. to 200° C.

13 . The method of claim 12 , wherein the decomposing is performed at least in part by flowing hydrogen fluoride at a flow rate of between 100 sccm and 800 sccm.

14 . The method of claim 13 , wherein the decomposing is performed at least in part by flowing ammonia at a flow rate of between 50 sccm and 300 sccm.

15 . A method of manufacturing a semiconductor device, the method comprising:

forming a mask with an opening over a first gate stack and a second gate stack, the first gate stack having a first gate length of between 400 Å and 600 Å and the second gate stack having a second gate length of between 1,000 Å and 3,000 Å;

lining the opening with a liner;

etching through the liner multiple times, wherein between each one of the multiple times the liner is reconstituted and wherein, at an end of the etching through the liner multiple times, the liner comprises silicon oxide;

changing the silicon oxide to produce (NH 4 ) 2 SiF 6 ;

heating the (NH 4 ) 2 SiF 6 to remove the (NH 4 ) 2 SiF 6 ; and

after the heating, forming capped air spacers adjacent to the first gate stack.

16 . The method of claim 15 , wherein the forming capped air spacers deposits silicon nitride.

17 . The method of claim 15 , wherein the forming capped air spacers deposits silicon carbon oxynitride.

18 . The method of claim 15 , wherein the forming capped air spacers deposits silicon oxycarbide.

19 . The method of claim 15 , further comprising reducing a height of the first gate stack to between 200 Å and 300 Å.

20 . The method of claim 15 , wherein the changing the silicon oxide comprises flowing hydrogen fluoride and ammonia.

Continuity (4)
Continuation 17114082 · Dec 7, 2020
Continuation 16400418 · May 1, 2019
Provisional Application 62773716 · Nov 30, 2018
Related Publication 20240128126A1 · Apr 18, 2024
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