IP Library › Granted Patent US 12,593,491
Granted Patent B2
US 12,593,491 · App. 18/536,138 · Granted Mar 31, 2026

Semiconductor devices with Schottky barriers

Inventors: Yun Shi (San Diego, CA); John Tzung-Yin Lee (Costa Mesa, CA)
Assignee: Skyworks Solution, Inc.
H10D64/647H03K17/6871H03F3/245H03F2200/451
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Quick Facts
Patent No.
US 12,593,491
App. No.
18/536,138
Granted
Mar 31, 2026
Kind
B2
Abstract

Circuits, systems, devices, and methods related to transistors with Schottky barriers are discussed herein. For example, a method of fabricating a transistor can include forming a p-well or an n-well in a substrate and forming a gate for the transistor. The method can also include doping a region within the p-well or n-well with a concentration below a threshold and forming a conductor layer on the doped region.

Claims (38)

1 . A method of fabricating a transistor, the method comprising:

forming a p-well or an n-well on an insulator layer;

forming a gate for the transistor, the transistor comprising a Silicon-on-Insulator (SOI) device;

doping a first region within the p-well or the n-well with a concentration that is below a threshold to form a source for the transistor;

doping a second region within the p-well or the n-well with the concentration to form a drain for the transistor, at least a portion of the gate being disposed directly in-line with and between the first region and the second region; and

forming a first contact on the first region and a second contact on the second region.

2 . The method of claim 1 wherein the first contact on the first region forms a non-ohmic contact.

3 . The method of claim 1 wherein at least a portion of the p-well or the n-well is disposed between the source and the drain of the transistor.

4 . The method of claim 1 wherein the concentration is less than a doping concentration associated with an ohmic contact.

5 . The method of claim 1 wherein the concentration is less than, by a least a threshold amount, a doping concentration of an ohmic contact.

6 . The method of claim 1 further comprising forming the insulator layer on a substrate to form the transistor as the SOI device.

7 . The method of claim 1 wherein the first region and first contact form the source for the transistor and the second region and second contact form the drain for the transistor.

8 . The method of claim 1 wherein the first region extends beyond the p-well or the n-well and forms an exposed surface.

9 . A radio-frequency switch comprising:

an input node;

an output node; and

a transistor connected between the input node and the output node, the transistor being configured to control passage of a radio-frequency signal from the input node to the output node, the transistor including a p-well or an n-well, a first region within the p-well or the n-well, a second region within the p-well or the n-well, a first contact disposed on the first region, and a second contact disposed on the second region, the first region and the second region being doped with a concentration below a threshold, the transistor is implemented as a Silicon-on-Insulator (SOI) device, the first region extending beyond a surface of the p-well or the n-well.

10 . The radio-frequency switch of claim 9 wherein the first region and first contact form a Schottky barrier.

11 . The radio-frequency switch of claim 10 wherein the Schottky barrier is configured to compensate for third order distortion.

12 . The radio-frequency switch of claim 9 wherein the first region forms at least a portion of a source for the transistor and the second region forms at least a portion of a drain for the transistor.

13 . The radio-frequency switch of claim 9 wherein the first and second contacts are each a metal contact.

14 . The radio-frequency switch of claim 9 wherein the first contact disposed on the first region forms a non-ohmic contact.

15 . The radio-frequency switch of claim 9 wherein at least a portion of the p-well or the n-well is disposed between the first region and the second region.

16 . The radio-frequency switch of claim 9 wherein the first region is an exposed surface.

17 . A transistor comprising:

a substrate;

an insulator layer formed on the substrate;

a p-well or an n-well formed on the insulator layer;

a first region in the p-well or the n-well that is doped with a concentration below a threshold, the first region forming an exposed surface along the p-well or n-well;

a second region in the p-well or the n-well that is doped with the concentration;

a first contact disposed on the first region; and

a second contact disposed on the second region.

18 . The transistor of claim 17 wherein the first region forms at least a portion of a source for the transistor and the second region forms at least a portion of a drain for the transistor.

19 . The transistor of claim 17 wherein the first region and first contact form a Schottky barrier.

20 . A radio-frequency device comprising:

a transceiver configured to generate a radio-frequency signal;

a power amplifier coupled to the transceiver and configured to generate an amplified radio-frequency signal; and

a radio-frequency switch including the transistor of claim 17 , the radio-frequency switch being coupled to the power amplifier and being configured to selectively route the amplified radio-frequency signal.

Continuity (4)
Continuation 17888351 · Aug 15, 2022
Continuation 16911677 · Jun 25, 2020
Provisional Application 62866737 · Jun 26, 2019
Related Publication 20240186413A1 · Jun 6, 2024
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