Package structure and method of forming the same
Provided are a package structure and a method of forming the same. The method includes: forming an interconnect structure on a substrate; performing a laser grooving process to form a first opening in the interconnect structure and form a debris layer on a sidewall of the first opening in a same step; forming a protective layer to fill in the first opening and cover the debris layer and the interconnect structure; patterning the protective layer to form a second opening, wherein the second opening is spaced from the debris layer by the protective layer; performing a planarization process on the protective layer to expose a topmost contact pad of the interconnect structure; and performing a mechanical dicing process through the second opening to form a third opening in the substrate and cut the substrate into a plurality of semiconductor dies.
1 . A method of forming a package structure, comprising:
forming an interconnect structure on a substrate;
performing a laser grooving process to form a first opening in the interconnect structure and form a debris layer on a sidewall of the first opening in a same step;
forming a protective layer to fill in the first opening and cover the debris layer and the interconnect structure;
patterning the protective layer to form a second opening, wherein the second opening is spaced from the debris layer by the protective layer;
performing a planarization process on the protective layer to expose a topmost contact pad of the interconnect structure; and
performing a mechanical dicing process through the second opening to form a third opening in the substrate and cut the substrate into a plurality of semiconductor dies.
2 . The method of claim 1 ,
wherein the substrate has a plurality of die regions and a scribe line region surrounding the plurality of die regions,
wherein the first opening, the second opening, and the third opening are all located in the scribe line region.
3 . The method of claim 1 , wherein a width of the first opening is greater than a width of the second opening, and the width of the second opening is greater than a width of the third opening.
4 . The method of claim 1 , wherein before the forming the protective layer, the method further comprises performing a surface treatment to increase an adhesion between the protective layer and the interconnect structure.
5 . The method of claim 1 , wherein the patterning the protective layer comprises performing a photolithography process on the protective layer.
6 . The method of claim 1 , wherein the patterning the protective layer comprises performing a laser ablation process on the protective layer.
7 . The method of claim 1 , wherein the first opening penetrates through the interconnect structure and partially into the substrate.
8 . The method of claim 1 , wherein the third opening extends from a bottom surface of the second opening to a bottom surface of the substrate.
9 . The method of claim 1 , further comprising: forming an encapsulant to laterally encapsulate the plurality of semiconductor dies, wherein the encapsulant is physically spaced from the debris layer by the protective layer.
10 . The method of claim 1 , wherein after performing the planarization process, a top surface of the protective layer is level with a top surface of the topmost contact pad of the interconnect structure.
11 . A method of forming a package structure, comprising:
forming at least one device die, comprising:
providing a substrate having a die region and a scribe line region;
forming an interconnect structure on the substrate in the die region;
forming a debris layer on the substrate in the scribe line region and overlying a sidewall of the interconnect structure; and
forming a protective layer extending from a top surface of the interconnect structure to cover a surface of the debris layer; and
forming an encapsulant to laterally encapsulate the at least one device die, wherein the encapsulant is physically spaced from the debris layer by the protective layer, and a Young's modulus of the protective layer is less than a Young's modulus of the encapsulant.
12 . The method of claim 11 , wherein a top surface of the substrate in the die region is higher than a top surface of the substrate in the scribe line region.
13 . The method of claim 11 , wherein the protective layer completely wraps the surface of the debris layer, so that the encapsulant is not in contact with the debris layer.
14 . The method of claim 11 , wherein a sidewall of the protective layer is laterally offset inward from a sidewall of the substrate.
15 . The method of claim 11 , wherein a top surface of the protective layer is level with a top surface of a topmost contact pad of the interconnect structure.
16 . A method of forming a package structure, comprising:
forming a first opening in a semiconductor wafer between a first semiconductor die and a second semiconductor die, and a debris layer is formed on a sidewall of the first opening simultaneously;
forming a stress buffer layer to fill in the first opening and cover the debris layer;
forming a second opening in the stress buffer layer within the first opening;
cutting the semiconductor wafer to form a third opening, wherein the second opening is in spatial communication with the third opening to separate the first semiconductor die from the second semiconductor die; and
forming an encapsulant to laterally encapsulate the first semiconductor die and/or the second semiconductor die, wherein the encapsulant is physically spaced from the debris layer by the stress buffer layer.
17 . The method of claim 16 , wherein the second opening is located on the third opening, and a width of the second opening is greater than a width of the third opening.
18 . The method of claim 16 , wherein the encapsulant is in direct contact with the stress buffer layer and not in direct contact with the debris layer.
19 . The method of claim 16 , wherein the forming the first opening comprises: performing a laser grooving process.
20 . The method of claim 16 , wherein a Young's modulus of the stress buffer layer is less than a Young's modulus of the encapsulant.