Semiconductor device having a through-via structure electrically connected to a contact structure
A semiconductor device includes a first semiconductor substrate having a protruding active pattern, a gate structure, a source/drain region in the active pattern on a side of the gate structure, an interlayer insulating layer on the source/drain region, a contact structure connected to the source/drain region through the interlayer insulating layer, a through-via structure electrically connected to the contact structure and passing through the interlayer insulating layer and the first semiconductor substrate, a first bonding structure including a first insulating layer on the first semiconductor substrate and a first connection pad in the first insulating layer, a second bonding structure on the first bonding structure and including a second insulating layer bonded to the first insulating layer and a second connection pad in the second insulating layer and bonded to the first connection pad, and a second semiconductor substrate disposed on the second bonding structure.
1 . A semiconductor device, comprising:
a first semiconductor substrate having a first surface and a second surface opposite to each other;
an active pattern protruding from the first surface of the first semiconductor substrate, the active pattern extending in a first direction;
a gate structure in a region of the active pattern, the gate structure extending in a second direction intersecting the first direction;
a source/drain region in the active pattern on a side of the gate structure;
an interlayer insulating layer on the source/drain region;
a contact structure extending through the interlayer insulating layer to connect to the source/drain region;
a through-via structure electrically connected to the contact structure and passing through the interlayer insulating layer and the first semiconductor substrate;
a first bonding structure including a first insulating layer on the second surface of the first semiconductor substrate and a first connection pad embedded in the first insulating layer, the first connection pad being connected to the through-via structure;
a second bonding structure on the first bonding structure and including a second insulating layer bonded to the first insulating layer and a second connection pad embedded in the second insulating layer and bonded to the first connection pad; and
a second semiconductor substrate on the second bonding structure.
2 . The semiconductor device as claimed in claim 1 , wherein the contact structure has an extension extending in the second direction and connected to the through-via structure.
3 . The semiconductor device as claimed in claim 1 , further comprising a first wiring portion on the interlayer insulating layer and electrically connected to each of the contact structure and the through-via structure.
4 . The semiconductor device as claimed in claim 3 , wherein the interlayer insulating layer has an upper surface coplanar with an upper surface of each of the contact structure and the through-via structure.
5 . The semiconductor device as claimed in claim 3 , further comprising a support substrate on the first wiring portion.
6 . The semiconductor device as claimed in claim 5 , wherein the support substrate includes a bonding insulating layer bonded to the first wiring portion.
7 . The semiconductor device as claimed in claim 1 , further comprising a second wiring portion between the second semiconductor substrate and the second bonding structure and electrically connected to the second connection pad.
8 . The semiconductor device as claimed in claim 7 , wherein the second wiring portion is configured to supply power to the source/drain region through the through-via structure.
9 . The semiconductor device as claimed in claim 8 , wherein the second semiconductor substrate includes a through-via passing through the second semiconductor substrate and connected to the second wiring portion.
10 . The semiconductor device as claimed in claim 1 , wherein the second semiconductor substrate includes a semiconductor substrate in which a logic or memory device is implemented.
11 . The semiconductor device as claimed in claim 1 , wherein the first semiconductor substrate has a thickness of 1 μm or less.
12 . The semiconductor device as claimed in claim 1 , wherein the through-via structure includes a conductive material and an insulating barrier surrounding a side surface of the conductive material.
13 . The semiconductor device as claimed in claim 12 , wherein the through-via structure has a portion protruding from the second surface of the first semiconductor substrate, a bottom surface of the portion including the conductive material.
14 . The semiconductor device as claimed in claim 13 , wherein the first insulating layer includes:
a first insulating film on the second surface of the first semiconductor substrate, the first insulating film having a surface coplanar with the bottom surface of the portion, and
a second insulating film on the first insulating film, the second insulating film having a surface coplanar with a surface of the first connection pad.
15 . The semiconductor device as claimed in claim 1 , further comprising:
channel layers on the active pattern, the channel layers being spaced apart from each other in a third direction, perpendicular to the first and second directions, and each of the channel layers extending in the first direction,
wherein the gate structure includes a gate electrode surrounding the channel layers and extending in the second direction, and a gate insulating layer between the channel layers and the gate electrode and between the active pattern and the gate electrode.
16 . A semiconductor device, comprising:
a device substrate structure including a first semiconductor substrate having a first surface and a second surface opposite to each other and an active pattern protruding from the first surface and extending in a first direction, an interlayer insulating layer on the active pattern, a through-via structure electrically connected to the active pattern and passing through the interlayer insulating layer and the first semiconductor substrate, and a first wiring portion on the interlayer insulating layer;
a first bonding structure including a first insulating layer on the second surface of the first semiconductor substrate and a first connection pad embedded in the first insulating layer and connected to the through-via structure;
a second bonding structure on the first bonding structure and including a second insulating layer bonded to the first insulating layer and a second connection pad embedded in the second insulating layer and bonded to the first connection pad;
a power supply substrate structure including a second wiring portion on the second bonding structure and a second semiconductor substrate having a through-via connected to the second wiring portion; and
a support substrate on the first wiring portion.
17 . The semiconductor device as claimed in claim 16 , wherein:
the through-via structure has a width narrowing toward the second surface of the first semiconductor substrate, and
the through-via has a width narrowing toward the second bonding structure.
18 . The semiconductor device as claimed in claim 16 , wherein a bonding interface of the first insulating layer and the second insulating layer includes a material different from a material in other portions of an interface between the first bonding structure and the second bonding structure.
19 . A semiconductor device, comprising:
a first semiconductor substrate having a first surface and a second surface opposite to each other;
an active pattern protruding from the first surface of the first semiconductor substrate, the active pattern extending lengthwise in a first direction;
a gate structure in a region of the active pattern, the gate structure extending lengthwise in a second direction intersecting the first direction;
a source/drain region on the active pattern on a side of the gate structure;
an interlayer insulating layer on the source/drain region;
a contact structure extending through the interlayer insulating layer to connect to the source/drain region;
a through-via structure electrically connected to the contact structure;
a first bonding structure including a first insulating layer on the second surface of the first semiconductor substrate and a first connection pad embedded in the first insulating layer, the first connection pad being connected to the through-via structure;
a second bonding structure on the first bonding structure and including a second insulating layer bonded to the first insulating layer and a second connection pad embedded in the second insulating layer and bonded to the first connection pad; and
a second semiconductor substrate on the second bonding structure,
wherein the through-via structure extends from the first bonding structure through at least a portion of the interlayer insulating layer, and
wherein an upper surface of the through-via structure is farther from the first surface of the first semiconductor substrate than an upper surface of the active pattern.
20 . The semiconductor device as claimed in claim 19 , wherein the upper surface of the through-via structure is farther from the first surface of the first semiconductor substrate than an upper surface of the source/drain region.