IP Library › Granted Patent US 12,614,670
Granted Patent B2
US 12,614,670 · App. 18/746,113 · Granted Apr 28, 2026

Multilayer ceramic capacitor

Inventors: Hironori Tsutsumi (Nagaokakyo, JP); Mitsuru Ikeda (Nagaokakyo, JP); Akihiro Yoshida (Nagaokakyo, JP); Takayuki Shimakawa (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G4/012H01G4/232H01G4/30H01G4/0085
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Quick Facts
Patent No.
US 12,614,670
App. No.
18/746,113
Granted
Apr 28, 2026
Kind
B2
Abstract

A multilayer ceramic capacitor includes an element body portion including dielectric layers and internal electrode layers, and external electrodes. In a cross section of the element body portion extending through a central portion in a length direction, a deviation amount in a width direction between internal electrode layers adjacent to each other in a thickness direction is smaller than about 3 μm, each of the internal electrode layers includes an opposing portion opposed to the internal electrode layer, and a lead-out portion, a width of the opposing portion is greater than a width of the lead-out portion, a region of the element body portion where the lead-out portions overlap in the thickness direction includes a thick portion thicker than the central portion in the length direction, and end portions of the lead-out portions in the thickness direction deviate by about 3 μm or more in the width direction.

Claims (30)

1 . A multilayer ceramic capacitor comprising:

an element body portion including a first principal surface and a second principal surface opposite to each other in a thickness direction, a first side surface and a second side surface opposite to each other in a width direction, and a first end surface and a second end surface opposite to each other in a length direction, and a plurality of dielectric layers and a plurality of internal electrode layers laminated in the thickness direction; and

a pair of external electrodes respectively on the first end surface and the second end surface, and electrically connected to the plurality of internal electrode layers; wherein

in a cross section of the element body portion extending through a central portion in the length direction and parallel or substantially parallel to the thickness direction and the width direction, a deviation amount in the width direction between internal electrode layers adjacent to each other in the thickness direction is smaller than about 3 μm;

each of the plurality of internal electrode layers includes an opposing portion opposed to the internal electrode layer which is adjacent in the thickness direction, and a lead-out portion connected to the opposing portion and extending to the first end surface or the second end surface;

a width of the opposing portion is greater than a width of the lead-out portion in the width direction;

a region of the element body portion at which the lead-out portions overlap in the thickness direction includes a thick portion which is thicker than the central portion of the element body portion in the length direction; and

end portions in the width direction of the lead-out portions which are adjacent to each other in the thickness direction are deviated by about 3 μm or more in the width direction.

2 . The multilayer ceramic capacitor according to claim 1 , wherein Si or Mg is segregated in both end portions of the lead-out portion in the width direction.

3 . The multilayer ceramic capacitor according to claim 1 , wherein Si is segregated on a principal surface of the lead-out portion on one side in the thickness direction.

4 . The multilayer ceramic capacitor according to claim 1 , wherein Mg is segregated on a principal surface of the lead-out portion on one side in the thickness direction.

5 . The multilayer ceramic capacitor according to claim 1 , wherein

each of the plurality of internal electrode layers includes a non-connection end portion not connected to the external electrodes on a side opposite to a side on which the lead-out portion is located in the length direction; and

Si is segregated in the non-connection end portion.

6 . The multilayer ceramic capacitor according to claim 1 , wherein

each of the plurality of internal electrode layers includes a non-connection end portion not connected to the external electrodes on a side opposite to a side on which the lead-out portion is located in the length direction; and

Mg is segregated in the non-connection end portion.

7 . The multilayer ceramic capacitor according to claim 1 , wherein the pair of external electrodes respectively cover an entirety or substantially an entirety of the first and second end surfaces.

8 . The multilayer ceramic capacitor according to claim 1 , wherein each of the pair of external electrodes extends onto portions of the first and second principal surface and the first and second side surfaces.

9 . The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of dielectric layers includes a perovskite compound including Ba and Ti as a primary component.

10 . The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of dielectric layers includes Si, Mg, Mn, V, Cr, or rare earth element as an additive.

11 . The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of internal electrode layers includes Ni.

12 . The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of internal electrode layers includes Sn at an interface with respective ones of the plurality of dielectric layers.

13 . The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor has a dimension in the length direction of greater than or equal to about 0.2 mm and less than or equal to about 4.5 mm, a dimension in the width direction of greater than or equal to about 0.125 mm and less than or equal to about 3.2 mm, and a dimension in the thickness direction of greater than or equal to about 0.125 mm and less than or equal to about 2.5 mm in thickness direction.

14 . The multilayer ceramic capacitor according to claim 1 , wherein

the lead-out portion of an internal electrode layer of the plurality of internal electrode layers closest to the first principal bulges towards the first principal surface; and

the lead-out portion of an internal electrode layer of the plurality of internal electrode layers closest to the second principal bulges towards the second principal surface.

15 . The multilayer ceramic capacitor according to claim 1 , wherein each of the first end surface and the second end surface is recessed inward in the length direction toward a central portion in the thickness direction.

16 . The multilayer ceramic capacitor according to claim 1 , wherein a shortest distance from end portions of the lead-out portions to the first and second end surfaces is greater than or equal to about 90 μm and less than or equal to about 110 μm.

17 . The multilayer ceramic capacitor according to claim 1 , wherein each of the first and second principal surfaces bulge outward in the thickness direction at both end portion sides in the length direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2024
From: TSUTSUMI, HIRONORI; IKEDA, MITSURU; YOSHIDA, AKIHIRO; SHIMAKAWA, TAKAYUKI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 067755/0584 →
Priority Claims (1)
JP 2023-109257 · Jul 3, 2023 · national
Continuity (1)
Related Publication 20250014820A1 · Jan 9, 2025
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