IP Library Granted Patent US 12,633,258
Granted Patent B2
US 12,633,258 · App. 18/326,291 · Granted May 19, 2026

Display device

Inventors: Kiwook Kim (Yongin-si, KR); Kwangmin Kim (Yongin-si, KR); Jisu Na (Yongin-si, KR); Minwoo Byun (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G09G3/3233H10K59/12H10K59/131H10K59/1315H10K59/8731H10K77/00H10K77/10H10K59/8722
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Quick Facts
Patent No.
US 12,633,258
App. No.
18/326,291
Granted
May 19, 2026
Kind
B2
Abstract

A display device includes a substrate including a trench portion. The substrate includes a display area and a peripheral area adjacent to the display area. The display area includes a first display area and a second display area arranged with the trench portion therebetween to display an image. A thin-film transistor and a display element are each arranged in the display area. A built-in circuit portion is over the peripheral area and is adjacent to the trench portion. A first wiring is in the first display area and a second wiring is in the second display area. A connecting wiring connects the first wiring to the second wiring and overlaps the built-in circuit portion.

Claims (25)

1 . A display device comprising:

a substrate including a first area and a second area, and a third area at least partially disposed between the first area and the second area,

a first thin-film transistor and a first display element in the first area;

a second thin-film transistor and a second display element in the second area;

a circuit portion including a third thin-film transistor in the third area;

a first wiring in the first area;

a second wiring in the second area; and

a connecting wiring connecting the first wiring to the second wiring,

wherein the connecting wiring is disposed in the third area, and

wherein the connecting wiring at least partially overlaps the third thin-film transistor in a cross-sectional view.

2 . The display device of claim 1 , wherein the substrate includes a through portion being penetrated an upper surface and a lower surface of the substrate, and the third area is disposed around the through portion.

3 . The display device of claim 2 , wherein the connecting wiring is disposed bypassing the through portion in the third area.

4 . The display device of claim 1 , wherein the connecting wiring is disposed on a different layer from the first wiring and the second wiring.

5 . The display device of claim 1 , wherein the first wiring and the second wiring are disposed on a same layer.

6 . The display device of claim 1 , further comprising:

an inorganic protective layer substantially covering the first wiring and the second wiring; and

a planarization layer disposed on the inorganic protective layer,

wherein the connecting wiring is located over the planarization layer and connected to the first wiring and the second wiring through a first contact hole and a second contact hole penetrating the planarization layer and the inorganic protective layer, respectively.

7 . The display device of claim 1 , further comprising:

a lower conductive layer overlapping the first thin-film transistor with an insulating layer therebetween, the lower conductive layer being located between the substrate and the first thin-film transistor,

wherein the connecting wiring is on a same layer as that of the lower conductive layer.

8 . The display device of claim 7 , wherein the connecting wiring is connected to the first wiring through a contact hole penetrating the insulating layer.

9 . The display device of claim 1 , further comprising:

a thin-film encapsulation layer sealing the first area, the second area, and the third area, wherein the thin-film encapsulation layer comprises at least one inorganic encapsulation layer and at least one organic encapsulation layer.

10 . The display device of claim 1 , wherein the connecting wiring has a bent portion.

Priority Claims (1)
KR 10-2018-0083128 · Jul 17, 2018 · national
Continuity (3)
Continuation 17134587 · Dec 28, 2020
Continuation 16364732 · Mar 26, 2019
Related Publication 20230309354A1 · Sep 28, 2023
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