Active biasing and termination approach for distributed amplifier circuit
An integrated distributed amplifier circuit can include an input transmission line structure comprising first unit cells including a first reactive circuit element and a first active circuit element, an output transmission line structure comprising second unit cells including a second reactive circuit element and a second active circuit element, and a termination circuit coupled to an end of the input transmission line structure. The termination circuit can include a current mirror circuit to establish a specified bias current for biasing respective first active circuit elements of the input transmission line structure. Such an approach can provide one or more of a broadband termination impedance and stable biasing conditions across different frequencies and power output levels.
1 . A distributed amplifier circuit, comprising:
an input transmission line structure comprising first unit cells, a respective one of the first unit cells comprising a first reactive circuit element and a first active circuit element, the first reactive circuit element coupled to an input node of the first active circuit element, an input port of the input transmission line structure defining a signal input port of the distributed amplifier circuit;
an output transmission line structure comprising second unit cells, a respective one of the second unit cells comprising a second reactive circuit element and a second active circuit element, the second reactive circuit element coupled to an output node of the second active circuit element, an output port of the output transmission line structure defining an amplified signal output port of the distributed amplifier circuit; and
a termination circuit coupled to an end of the input transmission line structure, the termination circuit configured to establish a specified termination impedance, the termination circuit comprising a current mirror circuit to establish a specified bias current for biasing respective first active circuit elements of the input transmission line structure; and
wherein the respective first active circuit elements are coupled with respective second active circuit elements to form respective amplifier circuits, the respective amplifier circuits coupled with each other in a cascaded manner using respective first reactive circuit elements and respective second reactive circuit elements.
2 . The distributed amplifier circuit of claim 1 , wherein the current mirror circuit is configured to establish the specified bias current and to act as a dissipative element terminating the input transmission line structure.
3 . The distributed amplifier circuit of claim 2 , wherein current mirror circuit comprises a diode-connected transistor monolithically co-integrated with the respective first active circuit elements and the respective second active circuit elements.
4 . The distributed amplifier circuit of claim 1 , wherein the termination circuit comprises a passive termination coupled with the current mirror circuit.
5 . The distributed amplifier circuit of claim 4 , wherein the termination circuit comprises a driver circuit, the driver circuit controlled by the current mirror circuit and configured to maintain the specified bias current for biasing respective first active circuit elements; and
wherein the passive termination comprises a resistor located within a feedback loop defined by the driver circuit and the current mirror circuit.
6 . The distributed amplifier circuit of claim 5 , wherein the termination circuit is monolithically co-integrated with respective first active circuit elements and the respective second active circuit elements.
7 . The distributed amplifier circuit of claim 6 , wherein the termination circuit comprises a resistor-capacitor (RC) filter in the feedback loop, the RC filter establishing a cut-off frequency corresponding to a minimum operating frequency specification of the distributed amplifier circuit.
8 . The distributed amplifier circuit of claim 5 , wherein the resistor is located in series between the driver circuit and a node corresponding to the end of the input transmission line structure.
9 . The distributed amplifier circuit of claim 1 , comprising a feedback resistor coupled between a node corresponding to the end of the input transmission line structure and a node of the output port of the output transmission line structure;
wherein a value of the feedback resistor establishes the specified bias current at least in part.
10 . The distributed amplifier circuit of claim 9 , wherein the feedback resistor is monolithically co-integrated with respective first active circuit elements and the respective second active circuit elements.
11 . The distributed amplifier circuit of claim 1 , wherein the current mirror circuit is monolithically co-integrated with the respective first active circuit elements and the respective second active circuit elements; and
wherein the distributed amplifier circuit further comprises a bias control node coupled to the current mirror circuit, the bias control node coupleable to a bias control component that is not monolithically co-integrated with the current mirror circuit.
12 . The distributed amplifier circuit of claim 11 , wherein the bias control node is coupleable to a reactive component that establishes a cut-off frequency corresponding to a minimum operating frequency specification of the distributed amplifier circuit.
13 . The distributed amplifier circuit of claim 12 , wherein the bias control component comprises a resistor and the reactive component comprises a capacitor.
14 . The distributed amplifier circuit of claim 1 , wherein the respective first active circuit elements and respective second active circuit elements comprise transistors monolithically co-integrated with the current mirror circuit.
15 . The distributed amplifier circuit of claim 14 , wherein the transistors comprise field effect transistors, the field effect transistors comprising compound-semiconductor high-electron-mobility transistors (HEMTs).
16 . The distributed amplifier circuit of claim 1 , wherein within respective first unit cells, the first reactive circuit element establishes a series inductance, and the first active circuit element establishes a shunt capacitance.
17 . A distributed amplifier circuit, comprising:
an input transmission line structure;
an output transmission line structure;
a termination circuit coupled to an end of the input transmission line structure, the termination circuit configured to establish a specified termination impedance, the termination circuit comprising a current mirror circuit to establish a specified bias current for biasing respective first active circuit elements of the input transmission line structure; and
a feedback resistor coupled between a node corresponding to the end of the input transmission line structure and a node of an output port of the output transmission line structure, a value of the feedback resistor establishing the specified bias current at least in part;
wherein the current mirror circuit is monolithically co-integrated with the respective first active circuit elements; and
wherein the distributed amplifier circuit further comprises a bias control node coupled to the current mirror circuit, the bias control node coupleable to a bias control component that is not monolithically co-integrated with the current mirror circuit.
18 . The distributed amplifier circuit of claim 17 , further comprising the bias control component, the bias control component comprising a resistor.
19 . The distributed amplifier circuit of claim 17 , wherein the bias control node is coupleable to a reactive component that establishes a cut-off frequency corresponding to a minimum operating frequency specification of the distributed amplifier circuit.
20 . A monolithically-integrated distributed amplifier circuit, comprising:
an input transmission line structure comprising respective first active circuit elements;
an output transmission line structure comprising respective second active circuit elements; and
a termination circuit coupled to an end of the input transmission line structure, the termination circuit configured to establish a specified termination impedance, the termination circuit comprising a current mirror circuit to establish a specified bias current for biasing the respective first active circuit elements of the input transmission line structure;
wherein the respective first active circuit elements and the respective second active circuit elements comprise compound-semiconductor high-electron-mobility transistors (HEMTs); and
wherein the current mirror circuit comprises a diode-connected field effect transistor (FET).