Semiconductor device and electronic device including the same
A semiconductor device includes a channel including a two-dimensional (2D) semiconductor material, a source electrode and a drain electrode electrically connected to opposite sides of the channel, respectively, a transition metal oxide layer on the channel and including a transition metal oxide, a dielectric layer on the transition metal oxide layer and including a high-k material, and a gate electrode on the dielectric layer.
1 . A semiconductor device, comprising:
a substrate;
a first channel layer and a second channel layer, the first channel layer and the second channel layer each including a two-dimensional (2D) semiconductor material and being spaced apart from each other in a direction that extends away from the substrate;
a source electrode and a drain electrode electrically connected to opposite sides of the first channel layer and the second channel layer, respectively;
a first transition metal oxide layer on the first channel layer and a second transition metal oxide layer on the second channel layer, the first transition metal oxide layer and the second transition metal oxide layer each including a transition metal oxide;
a first dielectric layer on the first transition metal oxide layer and a second dielectric layer on the second transition metal oxide layer, the first dielectric layer and the second dielectric layer each including a high-k material; and
a gate electrode on the first dielectric layer and the second dielectric layer,
wherein the first channel layer and the second channel layer are configured to exhibit different threshold voltages, based on respective materials of the first transition metal oxide layer, the first dielectric layer, the second transition metal oxide layer, and the second dielectric layer.
2 . The semiconductor device of claim 1 , wherein the first transition metal oxide layer and the first dielectric layer have different oxygen densities.
3 . The semiconductor device of claim 1 , wherein the first channel layer and the second channel layer each independently comprises a transition metal dichalcogenide (TMD) material.
4 . The semiconductor device of claim 3 , wherein the TMD material comprises
a metal element selected from Mo, W, Nb, V, Ta, Ti, Zr, Hf, Tc, Re, Cu, Ga, In, Sn, Ge, and Pb, and
a chalcogen element selected from S, Se, and Te.
5 . The semiconductor device of claim 3 , wherein the first transition metal oxide layer comprises an oxide of the TMD material included in the first channel layer.
6 . The semiconductor device of claim 3 , wherein the first channel layer and the first transition metal oxide layer each include an identical transition metal.
7 . The semiconductor device of claim 3 , wherein the first transition metal oxide layer and the first channel layer are separate portions of a unitary piece of material.
8 . The semiconductor device of claim 3 , wherein a thickness of the first transition metal oxide layer is equal to or greater than about 1 nm and is less than or equal to about 3 nm.
9 . The semiconductor device of claim 1 , wherein
the semiconductor device is configured to form a first electric dipole moment on an interfacial surface between the first transition metal oxide layer and the first dielectric layer,
the semiconductor device is configured to form a second electric dipole moment formed on an interfacial surface between the second transition metal oxide layer and the second dielectric layer, and
the first electric dipole moment and the second electric dipole moment have different magnitudes or polarities.
10 . The semiconductor device of claim 1 , wherein the first channel layer and the second channel layer comprise different TMD materials.
11 . The semiconductor device of claim 1 , further comprising:
a source structure comprising the source electrode, the source structure connecting the source electrode to the first channel layer; and
a drain structure comprising the drain electrode, the drain structure connecting the drain electrode to the first channel layer,
wherein the source structure and the drain structure are on the substrate.
12 . The semiconductor device of claim 11 , wherein each of the source structure and the drain structure comprises a semiconductor region, a silicide film, and a conductive barrier.
13 . The semiconductor device of claim 1 , wherein a thickness of the first channel layer is less than or equal to about 3 nm and greater than or equal to about 0.01 nm.
14 . The semiconductor device of claim 1 , wherein a length of the first channel layer in a direction in which the source electrode and the drain electrode are spaced apart from each other is less than or equal to about 5 nm and greater than or equal to about 0.01 nm.
15 . The semiconductor device of claim 1 , wherein the first channel layer comprises graphene, black phosphorus, amorphous boron nitride, or phosphorene.
16 . An electronic device, comprising:
a substrate; and
a plurality of semiconductor devices arranged on the substrate,
wherein each semiconductor device of the plurality of semiconductor devices includes
a first channel layer and a second channel layer, the first channel layer and the second channel layer each including a two-dimensional (2D) semiconductor material and being spaced apart from each other in a direction that extends away from the substrate;
a source electrode and a drain electrode electrically connected to opposite sides of the first channel layer and the second channel layer, respectively;
a first transition metal oxide layer on the first channel layer and a second transition metal oxide layer on the second channel layer, the first transition metal oxide layer and the second transition metal oxide layer each including a transition metal oxide;
a first dielectric layer on the first transition metal oxide layer and a second dielectric layer on the second transition metal oxide layer, the first dielectric layer and the second dielectric layer each including a high-k material; and
a gate electrode on the first dielectric layer and the second dielectric layer, and
wherein the plurality of semiconductor devices are configured to exhibit different threshold voltages.
17 . The electronic device of claim 16 , wherein, in the each semiconductor device of the plurality of semiconductor devices,
the first channel layer of the each semiconductor device comprises a plurality of channel layers that are spaced apart from each other in the direction that extends away from the substrate,
the first transition metal oxide layer and the second transition metal oxide layer of the each semiconductor device comprises a plurality of transition metal oxide layers respectively surrounding the plurality of channel layers, and
the first dielectric layer and the second dielectric layer of the each semiconductor device comprises a plurality of dielectric layers respectively surrounding the plurality of transition metal oxide layers.