Semiconductor device including interconnects with lower contact resistance
A semiconductor device includes a substrate, an interconnect layer disposed over the substrate and including a metal line, and a dielectric layer disposed on the interconnect layer and including a via contact. The via contact is electrically connected to the metal line and has a first dimension in a first direction greater than a second dimension in a second direction. The first direction and the second direction are perpendicular to each other, and are both perpendicular to a longitudinal direction of the via contact.
1 . A semiconductor device comprising:
a substrate;
an interconnect layer disposed over the substrate and including a metal line;
a dielectric layer disposed on the interconnect layer and including a via contact, the via contact being electrically connected to the metal line and having a first dimension in a first direction greater than a second dimension in a second direction, the first direction and the second direction being perpendicular to each other and both being perpendicular to a longitudinal direction of the via contact, the metal line extending in the second direction; and
another dielectric layer laterally covering an upper portion of the via contact in the second direction, so that a lower portion of the via contact is uncovered by the another dielectric layer;
wherein the via contact interfaces the dielectric layer in the first direction, and is spaced apart from the dielectric layer by the another dielectric layer in the second direction.
2 . The semiconductor device according to claim 1 , wherein a cross section of the via contact transverse to the longitudinal direction has an oval shape.
3 . The semiconductor device according to claim 1 , wherein the dielectric layer further includes a conductive line which is disposed on the via contact and which is electrically connected to the metal line through the via contact.
4 . The semiconductor device according to claim 3 , wherein the conductive line extends in the first direction.
5 . The semiconductor device according to claim 4 , wherein the dielectric layer directly borders the conductive line in the first direction.
6 . The semiconductor device according to claim 4 , further comprising another dielectric layer which laterally covers the conductive line in the second direction.
7 . The semiconductor device according to claim 6 , wherein the dielectric layer is spaced apart from the conductive line by the another dielectric layer in the second direction.
8 . A semiconductor device comprising:
a substrate;
an interconnect layer disposed over the substrate, and including a metal line;
a dielectric layer disposed over the interconnect layer;
an etch stop layer disposed between the interconnect layer and the dielectric layer:
a via contact disposed in a lower portion of the dielectric layer;
a plurality of conductive lines disposed in an upper portion of the dielectric layer, the via contact electrically interconnecting the metal line and one of the conductive lines, the conductive lines extending in an along-line direction and being spaced apart from each other in a cross-line direction that is transverse to the along-line direction, the via contact having a dimension in the along-line direction greater than a dimension of the via contact in the cross-line direction; and
another dielectric layer disposed on a lateral side of the via contact in the cross-line direction;
wherein the via contact interfaces the dielectric layer in the along-line direction, and is spaced apart from the dielectric layer by the another dielectric layer in the cross-line direction, the another dielectric layer including a material different from a material of the dielectric layer, and
wherein an interface between an upper portion of the via contact and the dielectric layer is misaligned with another interface between a lower portion of the via contact and the etch stop layer in the along-line direction.
9 . The semiconductor device according to claim 8 , wherein the another dielectric layer is disposed on a lateral side of one of the conductive lines in the cross-line direction such that the dielectric layer is spaced apart from the one of the conductive lines by the another dielectric layer in the cross-line direction.
10 . A semiconductor device comprising:
a metal line that is located on a lower plane and that extends in a cross-line direction;
a conductive line that is located on an upper plane located over the lower plane and that extends in an along-line direction not parallel to the cross-line direction;
a via contact that is located between the lower plane and the upper plane, and that electrically interconnects the metal line and the conductive line, a projection of the via contact from the upper plane onto the lower plane having a shape of an ellipse that has a major axis extending in the along-line direction and a minor axis extending in the cross-line direction;
a dielectric layer that is located between the upper plane and the lower plane, and that surrounds the via contact; and
another dielectric layer that is formed on sidewalls of the via contact in the cross-line direction and that is disposed between the via contact and the dielectric layer in the cross-line direction;
wherein the via contact adjoins the dielectric layer in the along-line direction, and is spaced apart from the dielectric layer by the another dielectric layer in the cross-line direction,
wherein a bottom surface of the another dielectric layer is higher than a bottom surface of the via contact.
11 . The semiconductor device according to claim 10 , further comprising:
an etch stop layer that is disposed over the metal line and that is disposed below the dielectric layer and the another dielectric layer, the via contact extending through the etch stop layer to be in electrical contact with the metal line.
12 . The semiconductor device according to claim 10 , wherein:
the conductive line is bordered by the dielectric layer in the along-line direction, and is bordered by the another dielectric layer in the cross-line direction.
13 . The semiconductor device according to claim 1 , wherein:
the another dielectric layer includes one of silicon nitride, silicon nitride doped with carbon, silicon oxide, silicon oxynitride, silicon oxynitride doped with carbon, silicon carbide, silicon oxycarbide, aluminum oxide, aluminum nitride, aluminum oxynitride, and combinations thereof.
14 . The semiconductor device according to claim 1 , wherein:
the another dielectric layer is inclined with respect to the longitudinal direction of the via contact.
15 . The semiconductor device according to claim 8 , wherein:
the another dielectric layer includes one of silicon nitride, silicon nitride doped with carbon, silicon oxide, silicon oxynitride, silicon oxynitride doped with carbon, silicon carbide, silicon oxycarbide, aluminum oxide, aluminum nitride, aluminum oxynitride, and combinations thereof.
16 . The semiconductor device according to claim 8 , wherein the another dielectric layer is inclined with respect to a longitudinal direction of the via contact.
17 . The semiconductor device according to claim 16 , wherein a cross section of the via contact transverse to the longitudinal direction has an oval shape.
18 . The semiconductor device according to claim 10 , wherein the another dielectric layer includes one of silicon nitride, silicon nitride doped with carbon, silicon oxide, silicon oxynitride, silicon oxynitride doped with carbon, silicon carbide, silicon oxycarbide, aluminum oxide, aluminum nitride, aluminum oxynitride, and combinations thereof.
19 . The semiconductor device according to claim 10 , wherein the another dielectric layer is inclined with respect to a longitudinal direction of the via contact.
20 . The semiconductor device according to claim 1 , further comprising an etch stop layer disposed between the interconnect layer and the dielectric layer, wherein an interface between the upper portion of the via contact and the dielectric layer and another interface between the lower portion of the via contact and the etch stop layer in the along-line direction define an included angle which is an obtuse angle.