IP Library Granted Patent US 12,651,732
Granted Patent B2
US 12,651,732 · App. 18/027,200 · Granted Jun 9, 2026

Apparatus diagnostic apparatus, semiconductor manufacturing apparatus system, and semiconductor apparatus manufacturing system

Inventors: Satoru Matsukura (Tokyo, JP); Yoshito Kamaji (Hsinchu, TW); Nanako Tamari (Tokyo, JP); Akira Kagoshima (Tokyo, JP); Masahiro Sumiya (Tokyo, JP)
Assignee: HITACHI HIGH-TECH CORPORATION
H01J37/32926H01J37/32935H10P72/0604
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Quick Facts
Patent No.
US 12,651,732
App. No.
18/027,200
Granted
Jun 9, 2026
Kind
B2
Abstract

An apparatus diagnostic apparatus that performs a computation process using data acquired from a semiconductor apparatus manufacturing apparatus having a reference chamber to create reference chamber feature quantity map data by mapping a feature quantity onto a graph having axes representing a plurality of parameters. The apparatus diagnostic apparatus also performs a computation process using data acquired from a semiconductor apparatus manufacturing apparatus having a calibration-target chamber to create calibration-target chamber feature quantity map data by mapping a feature quantity onto a graph having axes representing a plurality of parameters. Based on patterns observed in the reference chamber feature quantity map data and the calibration-target chamber feature quantity map data, the apparatus diagnostic apparatus identifies a performance difference between different chambers, a performance difference resulting from a temporal change of a single chamber, or a performance difference resulting from component replacement or component cleaning of a single chamber.

Claims (36)

1 . An apparatus diagnostic apparatus in which an inter-processing chamber performance difference of a semiconductor manufacturing apparatus is identified, comprising:

a processor; and

a memory coupled with the processor,

wherein the processor is configured to

determine a feature quantity of data collected from the semiconductor manufacturing apparatus;

create a feature quantity map data by mapping the feature quantity onto a graph with two or more dimensions having axes representing manufacturing condition parameters of the semiconductor manufacturing apparatus; and

identify the performance difference on the basis of the created feature quantity map data, wherein

the graph is divided into cells corresponding to the manufacturing condition parameters for each setting value of the manufacturing condition parameters, and

the mapped feature quantities are stored in the cells corresponding to the manufacturing condition parameters for the feature quantities.

2 . The apparatus diagnostic apparatus according to claim 1 ,

wherein the performance difference is identified by applying template matching to the feature quantity map data.

3 . The apparatus diagnostic apparatus according to claim 1 ,

wherein the performance difference includes a performance difference between different processing chambers, a performance difference resulting from a temporal change of a single processing chamber, and a performance difference resulting from component replacement or component cleaning of a single processing chamber.

4 . The apparatus diagnostic apparatus according to claim 1 ,

wherein a calibration amount of the parameters corresponding to the identified performance difference is determined.

5 . The apparatus diagnostic apparatus according to claim 1 ,

wherein the semiconductor manufacturing apparatus is a plasma etching apparatus.

6 . A semiconductor manufacturing apparatus system comprising the apparatus diagnostic apparatus according to claim 1 including a semiconductor manufacturing apparatus connected via a network.

7 . The apparatus diagnostic apparatus according to claim 1 , wherein the cell stores array data of the feature quantities.

8 . A semiconductor apparatus manufacturing system comprising:

a platform which is connected to a semiconductor manufacturing apparatus via a network,

wherein the platform comprises a processor and a memory coupled with the processor on which application program instructions are stored for identifying an inter-processing chamber performance difference of the semiconductor manufacturing apparatus,

wherein the application program instructions cause the processor to executes: operations comprising

a step of determining a feature quantity of data collected from the semiconductor manufacturing apparatus;

a step of creating feature quantity map data by mapping the feature quantity onto a graph with two or more dimensions having axes representing manufacturing condition parameters of the semiconductor manufacturing apparatus; and

a step of identifying the performance difference on the basis of the created feature quantity map data, and wherein

the graph is divided into cells corresponding to the manufacturing condition parameters for each setting value of the manufacturing condition parameters, and

the mapped feature quantities are stored in the cells corresponding to the manufacturing condition parameters for the feature quantities.

9 . An apparatus diagnosis method for identifying an inter-processing chamber performance difference of a semiconductor manufacturing apparatus, the apparatus diagnosis method comprising:

a step of determining a feature quantity of data collected from the semiconductor manufacturing apparatus,

a step of creating feature quantity map data by mapping the feature quantity onto a graph with two or more dimensions having axes representing manufacturing condition parameters of the semiconductor manufacturing apparatus, and

a step of identifying the performance difference on the basis of the created feature quantity map data, wherein

the graph is divided into cells corresponding to the manufacturing condition parameters for each setting value of the manufacturing condition parameters, and

the mapped feature quantities are stored in the cells corresponding to the manufacturing condition parameters for the feature quantities.

10 . The apparatus diagnosis method according to claim 9 ,

wherein the performance difference includes a performance difference between different processing chambers, a performance difference resulting from a temporal change of a single processing chamber, and a performance difference resulting from component replacement or component cleaning of a single processing chamber.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2023
From: MATSUKURA, SATORU; KAMAJI, YOSHITO; TAMARI, NANAKO; KAGOSHIMA, AKIRA; SUMIYA, MASAHIRO
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 063032/0616 →
Continuity (1)
Related Publication 20240339308A1 · Oct 10, 2024
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