IP Library › Granted Patent US 12,652,873
Granted Patent B2
US 12,652,873 · App. 18/561,210 · Granted Jun 9, 2026

Solid-state imaging apparatus and method for manufacturing the same

Inventors: Susumu Tonegawa (Kanagawa, JP); Hiroaki Ammo (Kanagawa, JP); Akiko Honjo (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H10F39/80373H10F39/014H10F39/811
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Quick Facts
Patent No.
US 12,652,873
App. No.
18/561,210
Granted
Jun 9, 2026
Kind
B2
Abstract

Provided is a solid-state imaging apparatus that includes a first semiconductor substrate including a photoelectric conversion section and a floating diffusion section, and a first transistor including a first semiconductor layer provided above the first semiconductor substrate, a first insulating film provided on a lower surface, an upper surface, and side surfaces of the first semiconductor layer, and a first electrode provided on a lower surface, an upper surface, and side surfaces of the first insulating film. The thickness of the first insulating film on the lower surface of the first semiconductor layer is larger than the thickness of the first insulating film on the upper surface or the side surfaces of the first semiconductor layer.

Claims (42)

1 . A solid-state imaging apparatus, comprising:

a first semiconductor substrate including a photoelectric conversion section and a floating diffusion section; and

a first transistor including a first semiconductor layer provided above the first semiconductor substrate, a first insulating film provided on a lower surface, an upper surface, and side surfaces of the first semiconductor layer, and a first electrode provided on a lower surface, an upper surface, and side surfaces of the first insulating film, wherein

a thickness of the first insulating film on the lower surface of the first semiconductor layer is larger than a thickness of the first insulating film on the upper surface or the side surfaces of the first semiconductor layer.

2 . The solid-state imaging apparatus according to claim 1 , wherein the thickness of the first insulating film on the lower surface of the first semiconductor layer is at least twice the thickness of the first insulating film on the upper surface or the side surfaces of the first semiconductor layer.

3 . The solid-state imaging apparatus according to claim 1 , wherein

the first semiconductor layer, the first insulating film, and the first electrode extend in a first direction parallel to a surface of the first semiconductor substrate, and

the first insulating film and the first electrode have a tubular shape surrounding the first semiconductor layer.

4 . The solid-state imaging apparatus according to claim 1 , wherein the first semiconductor layer is a part of a second semiconductor substrate provided above the first semiconductor substrate.

5 . The solid-state imaging apparatus according to claim 1 , wherein the first transistor includes an amplifying transistor, a select transistor, a reset transistor, or a switch transistor.

6 . The solid-state imaging apparatus according to claim 1 , wherein the first insulating film includes a first film provided on the lower surface of the first semiconductor layer and a second film provided on the upper surface and the side surfaces of the first semiconductor layer.

7 . The solid-state imaging apparatus according to claim 6 , wherein the first insulating film further includes a third film provided on a lower surface of the first film.

8 . The solid-state imaging apparatus according to claim 1 , wherein the first electrode includes a first layer provided on the lower surface of the first insulating film and a second layer provided on the upper surface and the side surfaces of the first insulating film.

9 . The solid-state imaging apparatus according to claim 1 , further comprising:

a second insulating film that has a thickness same as that of the first electrode on the lower surface of the first insulating film and that is provided laterally to the first electrode on the lower surface of the first insulating film.

10 . The solid-state imaging apparatus according to claim 1 , further comprising:

a first wire that is provided on an upper surface of the first electrode and that electrically connects the first electrode and the floating diffusion section.

11 . The solid-state imaging apparatus according to claim 1 , further comprising:

a second semiconductor layer provided above the first semiconductor substrate; and

a second wire that electrically connects the first semiconductor substrate and the second semiconductor layer.

12 . The solid-state imaging apparatus according to claim 11 , wherein the second semiconductor layer is a part of a second semiconductor substrate provided above the first semiconductor substrate.

13 . The solid-state imaging apparatus according to claim 1 , further comprising:

a third wire that is provided on a lower surface of the first electrode and that electrically connects the first electrode and the floating diffusion section.

14 . The solid-state imaging apparatus according to claim 1 , further comprising:

a fourth wire that is provided on a side surface of the first electrode and that electrically connects the first electrode and the floating diffusion section.

15 . A method for manufacturing a solid-state imaging apparatus, the method comprising:

forming a photoelectric conversion section and a floating diffusion section in a first semiconductor substrate; and

forming a first transistor including a first semiconductor layer provided above the first semiconductor substrate, a first insulating film provided on a lower surface, an upper surface, and side surfaces of the first semiconductor layer, and a first electrode provided on a lower surface, an upper surface, and side surfaces of the first insulating film, wherein

a thickness of the first insulating film on the lower surface of the first semiconductor layer is set larger than a thickness of the first insulating film on the upper surface or the side surfaces of the first semiconductor layer.

16 . The method for manufacturing the solid-state imaging apparatus according to claim 15 , wherein the first semiconductor layer is formed by laminating the first semiconductor substrate and a second semiconductor substrate to each other and processing the second semiconductor substrate and the first semiconductor layer.

17 . The method for manufacturing the solid-state imaging apparatus according to claim 16 , wherein

the first insulating film includes a first film provided on the lower surface of the first semiconductor layer and a second film provided on the upper surface and the side surfaces of the first semiconductor layer, and

the first semiconductor substrate and the second semiconductor substrate are laminated to each other via the first film provided on a lower surface of the second semiconductor substrate.

18 . The method for manufacturing the solid-state imaging apparatus according to claim 17 , wherein

the first insulating film further includes a third film provided on a lower surface of the first film, and

the first semiconductor substrate and the second semiconductor substrate are further laminated to each other via the third film provided on an upper surface of the first semiconductor substrate.

19 . The method for manufacturing the solid-state imaging apparatus according to claim 17 , wherein

the first semiconductor substrate and the second semiconductor substrate are further laminated to each other via a second insulating film provided on a lower surface of the first film, and

the first electrode is formed by removing, after the lamination, a part of the second insulating film between the first semiconductor substrate and the second semiconductor substrate, and forming, after the removal, a part of the first electrode between the first semiconductor substrate and the second semiconductor substrate.

20 . The method for manufacturing the solid-state imaging apparatus according to claim 16 , wherein

the first electrode includes a first layer provided on the lower surface of the first insulating film and a second layer provided on the upper surface and the side surfaces of the first insulating film, and

the first semiconductor substrate and the second semiconductor substrate are laminated to each other via the first layer provided on an upper surface of the first semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2023
From: TONEGAWA, SUSUMU; AMMO, HIROAKI; HONJO, AKIKO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 065575/0311 →
Priority Claims (1)
JP 2021-089586 · May 27, 2021 · national
Continuity (1)
Related Publication 20240258344A1 · Aug 1, 2024
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