IP Library › Granted Patent US 12,658,410
Granted Patent B2
US 12,658,410 · App. 17/713,433 · Granted Jun 16, 2026

Substrate processing apparatus including plurality of electrodes

Inventors: Yunhwan Kim (Hwaseong-si, KR); Dougyong Sung (Seoul, KR); Byeongsang Kim (Hwaseong-si, KR); Youngjin Noh (Ansan-si, KR); Namkyun Kim (Pyeongtaek-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01J37/32568H01J37/32091H01J37/32715H01J2237/2007H01J2237/20235H01J2237/334H10P72/0421
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Quick Facts
Patent No.
US 12,658,410
App. No.
17/713,433
Granted
Jun 16, 2026
Kind
B2
Abstract

A substrate processing apparatus includes a base plate, an upper plate on the base plate, a DC power supply configured to supply power to the upper plate, and a controller interconnecting the upper plate and the DC power supply. The upper plate includes a first electrode, and a second electrode spaced apart from the first electrode. The controller includes a first controller interconnecting the first electrode and the DC power supply, and a second controller interconnecting the second electrode and the DC power supply. The DC power supply is configured to apply a first voltage to the first electrode via the first controller, and configured to apply a second voltage to the second electrode via the second controller. The first voltage and the second voltage are different.

Claims (89)

1 . A substrate processing apparatus comprising:

a base plate;

an upper plate on the base plate;

a DC power supply configured to supply power to the upper plate; and

a controller interconnecting the upper plate and the DC power supply,

wherein the upper plate includes

a first dam defining a first region,

a second dam defining a second region together with the first dam,

an embossed portion disposed in each of the first region and the second region,

a first electrode vertically below the first region, and

a second electrode spaced apart from the first electrode and vertically below the second region,

wherein the controller includes

a first controller interconnecting the first electrode and the DC power supply, and

a second controller interconnecting the second electrode and the DC power supply,

wherein the DC power supply is configured to apply a first voltage to the first electrode via the first controller, and configured to apply a second voltage to the second electrode via the second controller,

wherein the first voltage and the second voltage are different,

wherein a first distance from a bottom surface of the upper plate to the first electrode is different from a second distance from the bottom surface of the upper plate to the second electrode, and

wherein an upper surface of the first electrode and a lower surface of the second electrode are vertically spaced from each other.

2 . The substrate processing apparatus according to claim 1 , wherein the second electrode surrounds the first electrode in a first plane.

3 . The substrate processing apparatus according to claim 1 , wherein the controller is configured to apply the second voltage that is higher than the first voltage.

4 . The substrate processing apparatus according to claim 1 , further comprising:

a porous block having a portion in the base plate, wherein the upper plate includes a first recess in which the portion of the porous block is disposed.

5 . The substrate processing apparatus according to claim 4 , wherein a top surface of the porous block is at a higher level than a top surface of the base plate.

6 . The substrate processing apparatus according to claim 4 , further comprising:

a first bushing in the base plate; and

a second bushing in the first bushing,

wherein a top surface of the porous block is at a higher level than a top surface of the first bushing.

7 . The substrate processing apparatus according to claim 6 , wherein

the first bushing includes

a cylinder portion surrounding the second bushing, and

a flange portion on the cylinder portion, and

the flange portion protrudes outwards from an outer side surface of the cylinder portion.

8 . The substrate processing apparatus according to claim 6 , wherein the upper plate includes a protrusion protruding toward the first bushing.

9 . The substrate processing apparatus according to claim 8 , wherein the first bushing includes a second recess receiving the protrusion.

10 . The substrate processing apparatus according to claim 1 , further comprising:

a lift pin bushing in the base plate;

a lift pin in the lift pin bushing; and

an adhesive layer between the upper plate and the base plate and between the upper plate and the lift pin bushing.

11 . The substrate processing apparatus according to claim 10 , wherein a first thickness of a first portion of the adhesive layer between the upper plate and the base plate is greater than a second thickness of a second portion of the adhesive layer between the upper plate and the lift pin bushing.

12 . The substrate processing apparatus according to claim 10 , wherein a top surface of the lift pin bushing is at a higher level than a top surface of the base plate.

13 . The substrate processing apparatus according to claim 10 , wherein the upper plate includes a protrusion protruding toward the lift pin bushing.

14 . The substrate processing apparatus according to claim 13 , wherein the lift pin bushing includes a recess receiving the protrusion.

15 . A substrate processing apparatus comprising:

an electrostatic chuck including a base plate, an upper plate on the base plate, and a bushing and a porous block in the base plate;

a DC power supply configured to supply power to the upper plate; and

a controller interconnecting the upper plate and the DC power supply,

wherein the upper plate includes

a first dam defining a first region,

a second dam defining a second region together with the first dam,

an embossed portion disposed in each of the first region and the second region,

a first electrode vertically below the first region, and

a second electrode spaced apart from the first electrode and vertically below the second region,

wherein the controller includes

a first controller interconnecting the first electrode and the DC power supply, and

a second controller interconnecting the second electrode and the DC power supply,

wherein the DC power supply is configured to apply a first voltage to the first electrode via the first controller, and configured to apply a second voltage to the second electrode via the second controller,

wherein the first voltage and the second voltage are different,

wherein a first distance from a bottom surface of the upper plate to the first electrode is different from a second distance from the bottom surface of the upper plate to the second electrode,

wherein an upper surface of the first electrode and a lower surface of the second electrode are vertically spaced from each other,

wherein the bushing includes

a first bushing contacting the base plate, and

a second bushing in the first bushing,

wherein the porous block is on the second bushing in the first bushing,

wherein the first bushing includes

a cylinder portion surrounding the second bushing, and

a flange portion surrounding a portion of the porous block, and

wherein a first thickness of the flange portion is greater than a second thickness of the cylinder portion.

16 . The substrate processing apparatus according to claim 15 , wherein:

the electrostatic chuck further includes an adhesive layer between the first bushing and the upper plate; and

a top surface of the porous block is at a higher level than the adhesive layer.

17 . The substrate processing apparatus according to claim 16 , wherein the upper plate includes a recess in which a portion of the porous block is disposed.

18 . A substrate processing apparatus comprising:

an electrostatic chuck including a base plate, an upper plate on the base plate, and a lift pin bushing and a lift pin in the base plate;

a DC power supply configured to supply power to the upper plate; and

a controller interconnecting the upper plate and the DC power supply,

wherein the upper plate includes

a first dam defining a first region,

a second dam defining a second region together with the first dam,

an embossed portion disposed in each of the first region and the second region,

a first electrode vertically below the first region, and

a second electrode spaced apart from the first electrode and vertically below the second region,

wherein a first distance from a bottom surface of the upper plate to the first electrode is different from a second distance from the bottom surface of the upper plate to the second electrode,

wherein an upper surface of the first electrode and a lower surface of the second electrode are vertically spaced from each other,

wherein the controller includes

a first controller interconnecting the first electrode and the DC power supply, and

a second controller interconnecting the second electrode and the DC power supply,

wherein the DC power supply is configured to apply a first voltage to the first electrode via the first controller, and configured to apply a second voltage to the second electrode via the second controller,

wherein the first voltage and the second voltage are different, and

wherein the lift pin is in the lift pin bushing, and a top surface of the lift pin bushing is at a higher level than a top surface of the base plate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2022
From: KIM, YUNHWAN; SUNG, DOUGYONG; KIM, BYEONGSANG; NOH, YOUNGJIN; KIM, NAMKYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 059529/0361 →
Priority Claims (1)
KR 10-2021-0128730 · Sep 29, 2021 · national
Continuity (1)
Related Publication 20230100582A1 · Mar 30, 2023
References Cited (30)
US 5761023A · Lue · 1998 [cited by examiner]
US 6215640B1 · Hausmann · 2001 [cited by examiner]
US 6625003B2 · Loo et al. · 2003 [cited by applicant]
US 8519332B2 · Miya et al. · 2013 [cited by applicant]
US 8673166B2 · Okita et al. · 2014 [cited by applicant]
US 10475688B2 · Ishimura · 2019 [cited by examiner]
US 20020027762A1 · Yamaguchi · 2002 [cited by examiner]
US 20020144657A1 · Chiang et al. · 2002 [cited by applicant]
US 20060043065A1 · Buchberger · 2006 [cited by examiner]
US 20070014073A1 · Retzlaff · 2007 [cited by examiner]
US 20080073032A1 · Koshiishi et al. · 2008 [cited by applicant]
US 20110140712A1 · Inoue · 2011 [cited by applicant]
US 20120320491A1 · Doh · 2012 [cited by examiner]
US 20160035610A1 · Park et al. · 2016 [cited by applicant]
US 20180277418A1 · Sato · 2018 [cited by examiner]
US 20200013595A1 · Lee · 2020 [cited by examiner]
US 20200135434A1 · Nakagawasai · 2020 [cited by examiner]
US 20200185248A1 · Sarode Vishwanath · 2020 [cited by examiner]
US 20210074523A1 · Ramachandran et al. · 2021 [cited by applicant]
US 20220026151A1 · Araki et al. · 2022 [cited by applicant]
US 20220301916A1 · Choi et al. · 2022 [cited by applicant]
KR 1019960012283 · 1996 [cited by applicant]
KR 1020080014660A · 2008 [cited by applicant]
KR 1020160015510A · 2016 [cited by applicant]
KR 1020180108470A · 2018 [cited by applicant]
KR 1020190103795A · 2019 [cited by applicant]
KR 1020210016929A · 2021 [cited by applicant]
KR 1020210087536A · 2021 [cited by applicant]
Office Action for Korean Application No. 10-2021-0128730 dated Feb. 4, 2025. [cited by applicant]
Notice of Allowance for Korean Application No. 10-2021-0128730 dated Oct. 2, 2025. [cited by applicant]