Semiconductor device and method for fabricating semiconductor device
A semiconductor device with a small variation in characteristics is provided. The semiconductor device includes a first insulator; a second insulator having an opening over the first insulator; a third insulator that has a first depressed portion and is provided inside the opening; a first oxide that has a second depressed portion and is provided inside the first depressed portion; a second oxide provided inside the second depressed portion; a first conductor and a second conductor that are electrically connected to the second oxide and are apart from each other; a fourth insulator over the second oxide; and a third conductor including a region overlapping with the second oxide with the fourth insulator therebetween. The second oxide includes a first region, a second region, and a third region sandwiched between the first region and the second region in a top view. The first conductor includes a region overlapping with the first region and the second insulator. The second conductor includes a region overlapping with the second region and the second insulator. The third conductor includes a region overlapping with the third region.
1 . A semiconductor device comprising:
a first insulator;
a second insulator comprising an opening over the first insulator;
a third insulator provided inside the opening, the third insulator comprising a first depressed portion;
a first oxide provided inside the first depressed portion, the first oxide comprising a second depressed portion;
a second oxide provided inside the second depressed portion;
a first conductor and a second conductor each electrically connected to the second oxide, the first conductor and the second conductor provided apart from each other;
a fourth insulator over the second oxide; and
a third conductor over the fourth insulator,
wherein the second oxide comprises a first region, a second region, and a third region between the first region and the second region in a top view,
wherein the first conductor overlaps at least the first region and the second insulator,
wherein the second conductor overlaps at least the second region and the second insulator,
wherein the third conductor comprises a region overlapping with the third region with the fourth insulator therebetween, and
wherein the third insulator is in contact with a side surface of the opening and the first insulator.
2 . The semiconductor device according to claim 1 ,
wherein the first oxide comprises indium, an element M (the element M is one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
3 . The semiconductor device according to claim 1 ,
wherein the second oxide comprises indium, an element M (the element Mis one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
4 . The semiconductor device according to claim 1 ,
wherein the second oxide is in contact with a bottom surface and a side surface of the second depressed portion.
5 . The semiconductor device according to claim 1 ,
wherein top surfaces of the second insulator, the third insulator, the first oxide, and the second oxide are substantially level with each other in a cross-sectional view.
6 . A semiconductor device comprising:
a first insulator;
a second insulator comprising an opening over the first insulator;
a third insulator provided inside the opening, the third insulator comprising a first depressed portion;
a first oxide provided inside the first depressed portion, the first oxide comprising a second depressed portion;
a second oxide provided inside the second depressed portion;
a first conductor and a second conductor each electrically connected to the second oxide, the first conductor and the second conductor provided apart from each other;
a fourth insulator over the second oxide; and
a third conductor over the fourth insulator,
wherein the second oxide comprises a first region, a second region, and a third region between the first region and the second region in a top view,
wherein the first conductor is in contact with the first region and the second insulator,
wherein the second conductor is in contact with the second region and the second insulator,
wherein the third conductor comprises a region overlapping with the third region with the fourth insulator therebetween, and
wherein the third conductor does not overlap the first region and the second region.
7 . The semiconductor device according to claim 6 ,
wherein the first oxide comprises indium, an element M (the element Mis one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
8 . The semiconductor device according to claim 6 ,
wherein the second oxide comprises indium, an element M (the element Mis one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
9 . The semiconductor device according to claim 6 ,
wherein the third insulator is in contact with a side surface of the opening and the first insulator.
10 . The semiconductor device according to claim 6 ,
wherein the second oxide is in contact with a bottom surface and a side surface of the second depressed portion.
11 . The semiconductor device according to claim 6 ,
wherein top surfaces of the second insulator, the third insulator, the first oxide, and the second oxide are substantially level with each other in a cross-sectional view.
12 . A semiconductor device comprising:
a first insulator;
a second insulator comprising an opening over the first insulator;
a third insulator provided inside the opening, the third insulator comprising a first depressed portion;
a first oxide provided inside the first depressed portion, the first oxide comprising a second depressed portion;
a second oxide provided inside the second depressed portion;
a first conductor and a second conductor each electrically connected to the second oxide, the first conductor and the second conductor provided apart from each other;
a fourth insulator over the second oxide; and
a third conductor over the fourth insulator,
wherein the second oxide comprises a first region, a second region, and a third region between the first region and the second region in a top view,
wherein the first conductor is in contact with the first region, the second insulator, and the third insulator,
wherein the second conductor is in contact with the second region, the second insulator, and the third insulator,
wherein the third conductor comprises a region overlapping with the third region with the fourth insulator therebetween, and
wherein the third conductor does not overlap the first conductor and the second conductor.
13 . The semiconductor device according to claim 12 ,
wherein the first oxide comprises indium, an element M (the element Mis one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
14 . The semiconductor device according to claim 12 ,
wherein the second oxide comprises indium, an element M (the element Mis one or more selected from aluminum, gallium, yttrium, tin, and titanium), and zinc.
15 . The semiconductor device according to claim 12 ,
wherein the third insulator is in contact with a side surface of the opening and the first insulator.
16 . The semiconductor device according to claim 12 ,
wherein the second oxide is in contact with a bottom surface and a side surface of the second depressed portion.
17 . The semiconductor device according to claim 12 ,
wherein top surfaces of the second insulator, the third insulator, the first oxide, and the second oxide are substantially level with each other in a cross-sectional view.