Semiconductor device structure with efficient heat-removal structures across the chip and monolithic fabrication method therefor
View Patent ↗The present invention discloses a device structure including heat removal structure (such as high thermal conductivity column and/or plate within the semiconductor substrate) to enhance heat dissipation. The device structure comprises a semiconductor substrate with an original semiconductor surface; a circuit element located within a semiconductor body region of the semiconductor substrate; and a vertical heat dissipation column in the semiconductor substrate and surrounding the semiconductor body region. Wherein the vertical heat dissipation column comprises a thermal dissipation material with a thermal conductivity higher than that of the semiconductor substrate or that of silicon oxide.
1 . A device structure, comprising:
a semiconductor substrate with an original semiconductor surface;
a transistor located within an active region of the semiconductor substrate, wherein the transistor comprises a gate structure, a source region next to one side of the gate structure, and a drain region next to another side of the gate structure, and;
a shallow trench isolation (STI) region surrounding the active region;
a vertical heat dissipation column in the STI region and surrounding the transistor;
wherein the vertical heat dissipation column comprises a thermal dissipation material with a thermal conductivity higher than that of silicon oxide;
wherein a top surface of the vertical heat dissipation column is higher or lower than the original semiconductor surface; and
an insulating layer covering and directly contacting the vertical heat dissipation column, wherein the vertical heat dissipation column is electrically isolated from the source region and the drain region, and a material of the STI region is different from the thermal dissipation material of the vertical heat dissipation column, and a material of the insulating layer is different from the thermal dissipation material of the vertical heat dissipation column.
2 . The device structure in claim 1 , wherein a top surface of insulating layer is higher than that of the gate structure of the transistor or higher than that of the source region.
3 . The device structure in claim 1 , wherein the STI region and the insulating layer comprise an oxide, respectively.
4 . The device structure in claim 1 , wherein the top surface of the vertical heat dissipation column is higher that of the source region.
5 . The device structure in claim 1 , wherein a top surface of the STI region is higher than the original semiconductor surface.
6 . The device structure in claim 5 , wherein a contact hole is between the STI region and the gate structure to reveal the source region of the transistor, and a metal plug is within the contact hole and connected to a top surface of the source region.
7 . The device structure in claim 6 , wherein the metal plug further connects to a most lateral sidewall of the source region.
8 . The device structure in claim 1 , wherein a top surface of the source region or the drain region of the transistor is higher than the original semiconductor surface.
9 . The device structure in claim 1 , wherein the drain region of the transistor includes a lightly-doped region laterally extending from a sidewall of the semiconductor substrate and a heavily-doped region laterally extending from the sidewall of the lightly-doped region.
10 . The semiconductor circuit structure of claim 9 , further comprising a metal contact connected to the top of the drain region.
11 . The device structure in claim 1 , wherein the transistor is a fin-structured transistor, a planar transistor, a GAA transistor, or a sheet transistor.
12 . The device structure in claim 1 , wherein the semiconductor substrate comprises an edge remote from the transistor, and the vertical heat dissipation column extends from a position adjacent to the transistor to the edge of the semiconductor substrate.
13 . The device structure in claim 12 , wherein a heat-dissipation sink is thermally coupled to the vertical heat dissipation column close to the edge of the semiconductor substrate through an opening above the vertical heat dissipation column.
14 . The device structure in claim 12 , wherein a heat-dissipation substrate is thermally coupled to the vertical heat dissipation column through an opening via penetrating through the substrate from a bottom surface of the substrate to the vertical heat dissipation column.
15 . The device structure in claim 1 , further comprising another transistor, the semiconductor substrate comprises an edge remote from the transistor and the another transistor, and the vertical heat dissipation column further extends to the edge of the semiconductor substrate.
16 . The device structure in claim 15 , further comprising:
a first horizontal heat dissipation plate right under the transistor; and
a second horizontal heat dissipation plate right under the another transistor;
wherein the vertical heat dissipation column connected to or thermally coupled to both the first horizontal heat dissipation plate and the second horizontal heat dissipation plate; and
wherein the first horizontal heat dissipation plate and/or the second horizontal heat dissipation plate comprises another thermal dissipation material with another thermal conductivity higher than that of the semiconductor substrate or that of silicon oxide.
17 . The device structure in claim 16 , wherein the thermal dissipation material and/or the another thermal dissipation material is BN, AlN or metal.
18 . The device structure in claim 16 , wherein:
the first horizontal heat dissipation plate is connected to or thermally coupled to bottom surfaces of a drain region and a source region of the first transistor, and the first horizontal heat dissipation plate is connected to the vertical heat dissipation column; and
the second horizontal heat dissipation plate is connected to or thermally coupled to bottom surfaces of a drain region and a source region of the another transistor, and the second horizontal heat dissipation plate is connected to the vertical heat dissipation column.
19 . The device structure in claim 1 , wherein the vertical heat dissipation column is between the insulating layer and the STI region.
20 . The device structure in claim 1 , wherein a top surface of the STI region is higher than the original semiconductor surface; wherein a concave is formed between the STI region and a gate structure of the transistor, and a metal plug is formed within the concave and contacted to the top of the drain region or the source region of the first transistor.
21 . The device structure in claim 16 , wherein the first horizontal heat dissipation plate and/or the second horizontal heat dissipation plate further comprises a thin oxide layer covering the another thermal dissipation material.