Reinforcement structures for chip-interposer and interposer-substrate bonding and methods of making the same
An embodiment semiconductor package includes an interposer, a first semiconductor die electrically coupled to a first side of the interposer, and a first reinforcement structure that is mechanically coupled to the interposer and to the first semiconductor die, such that the first reinforcement structure is a solid structure that is adhered to the interposer and to the first semiconductor die and includes an adhesive strength that is greater than 5 N/mm 2 and less than 10 N/mm 2 . The first reinforcement structure is formed at a corner or at an edge of the first semiconductor die and may have a modulus that is greater than 0.1 GPa and less than 1.0 GPa. The semiconductor package may further include a second semiconductor die electrically coupled to the first side of the interposer and a second reinforcement structure that is mechanically coupled to the interposer and to the second semiconductor die.
1 . A semiconductor package, comprising:
an interposer;
a first semiconductor die electrically coupled to a first side of the interposer; and
a first reinforcement structure that is mechanically coupled to the interposer and to the first semiconductor die,
wherein the first reinforcement structure comprises a first bottom surface formed below a top surface of the interposer at a first distance d 1 , wherein the first reinforcement structure is in contact with at least one of a second bottom surface or a side surface of the first semiconductor die at a corner of the first semiconductor die, and wherein the first reinforcement structure further comprises an adhesive strength that is greater than 5 N/mm 2 and less than 10 N/mm 2 .
2 . The semiconductor package of claim 1 , wherein the first reinforcement structure is formed at the corner or at the edge of the first semiconductor die.
3 . The semiconductor package of claim 1 , wherein the first reinforcement structure comprises epoxy, acrylic, or an adhesive material.
4 . The semiconductor package of claim 1 , wherein the first reinforcement structure comprises a modulus that is greater than 0.1 GPa and less than 1.0 GPa.
5 . The semiconductor package of claim 1 , wherein the first distance d 1 is greater than 0 microns and less than 100 microns.
6 . The semiconductor package of claim 5 , wherein the first reinforcement structure further extends above the top surface of the interposer to a second distance d 2 , wherein the second distance d 2 is greater than 0 microns and less than 770 microns, and
wherein the second distance d 2 corresponds to a separation between the top surface of the interposer and the second bottom surface of the first semiconductor die such that the first reinforcement structure is in contact with the second bottom surface of the first semiconductor die.
7 . The semiconductor package of claim 6 , wherein the first reinforcement structure further extends above the second bottom surface of the first semiconductor die to a third distance d 3 , wherein the third distance d 3 is greater than 0 microns and less than 770 microns and such that the first reinforcement structure is in contact with the side surface of the first semiconductor die, and
wherein a total thickness of the first reinforcement structure is given by a fourth distance d 4 , wherein the fourth distance d 4 equals a sum of the first distance d 1 , the second distance d 2 , and the third distance d 3 and is greater than 0 microns and less than 870 microns.
8 . The semiconductor package of claim 1 , wherein the first reinforcement structure is formed on the top surface of the interposer and partially overlaps with the first semiconductor die in a plan view such that the first reinforcement structure comprises:
a first portion that extends laterally to a region external to the first semiconductor die such as to be non-overlapping with the first semiconductor die in the plan view; and
a second portion of the first reinforcement structure that is formed in a space between the top surface of the interposer and the second bottom surface of the first semiconductor die such that the second portion is overlapping with the first semiconductor die in the plan view.
9 . The semiconductor package of claim 8 , wherein the first portion comprises a first width w 1 , wherein the first width w 1 is greater than 10 microns and less than 3 mm; and
wherein the second portion comprises a second width w 2 , wherein the second width is greater than 10 microns and less than 3 mm.
10 . The semiconductor package of claim 1 , wherein the first reinforcement structure is formed at the corner of the first semiconductor die and comprises a first length L 1 along a first direction and a second length L 2 along a second direction,
wherein the first length L 1 is greater than 10 microns and less than 33 mm, and
wherein the second length L 2 is greater than 10 microns and less than 33 mm.
11 . The semiconductor package of claim 1 , further comprising:
a package substrate electrically coupled to a second side of the interposer; and
a second reinforcement structure that is mechanically coupled to the interposer and to the package substrate.
12 . The semiconductor package of claim 1 , further comprising:
a second semiconductor die electrically coupled to the first side of the interposer; and
another first reinforcement structure that is mechanically coupled to the interposer and to the second semiconductor die.
13 . A semiconductor package, comprising:
an interposer;
a first semiconductor die electrically coupled to a first side of the interposer;
a package substrate electrically coupled to a second side of the interposer; and
a first reinforcement structure that is mechanically coupled to the interposer and to at least one of the first semiconductor die and the package substrate, wherein the first reinforcement structure comprises a first bottom surface formed below at least one of a first top surface of the interposer or a second top surface of the package substrate at a first distance d 1 .
14 . The semiconductor package of claim 13 , further comprising:
a second semiconductor die electrically coupled to the first side of the interposer; and
another first reinforcement structure that is mechanically coupled to the second semiconductor die,
wherein the first reinforcement structure is mechanically coupled to the first semiconductor die.
15 . The semiconductor package of claim 13 , wherein the first reinforcement structure comprises an adhesive strength that is greater than 5 N/mm 2 and less than 10 N/mm 2 and modulus that is greater than 0.1 GPa and less than 1.0 GPa.
16 . The semiconductor package of claim 13 , wherein
the first distance d 1 is greater than 0 microns and less than 100 microns.
17 . A semiconductor package, comprising:
an interposer;
a first semiconductor die attached to the interposer;
a second semiconductor die attached to the interposer and adjacent to the first semiconductor die;
a plurality of first reinforcement structures that are located at a corner of the first semiconductor die and the second semiconductor die; and
a plurality of second reinforcement structures that are located at edges between the first semiconductor die and the second semiconductor die, wherein each of the plurality of reinforcement structures and the plurality of second reinforcement structures comprise a bottom surface formed below a top surface of the interposer at a first distance d 1 .
18 . The semiconductor package of claim 17 , wherein the plurality of first reinforcement structures and the plurality of second reinforcement structures each comprises an adhesive strength that is greater than 5 N/mm 2 and less than 10 N/mm 2 and modulus that is greater than 0.1 GPa and less than 1.0 GPa.
19 . The semiconductor package of claim 17 , wherein a subset of the plurality of first reinforcement structures are mechanically coupled to the first semiconductor die,
a second subset of the plurality of first reinforcement structures are mechanically coupled to the second semiconductor die,
the plurality of second reinforcement structures are mechanically coupled to both the first semiconductor die and the second semiconductor die, and
wherein the first distance d 1 is greater than 0 microns and less than 100 microns.
20 . The semiconductor package of claim 17 , wherein the interposer is attached to a package substrate such that the first semiconductor die and the second semiconductor die are electrically connected to the interposer and the package substrate.