IP Library Granted Patent US 12,685,059
Granted Patent B2
US 12,685,059 · App. 17/739,783 · Granted Jul 14, 2026

Semiconductor device and method of forming the same

Inventors: Po-Wei Hu (New Taipei City, TW); Po-Chin Nien (Taipei City, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/3212H01L21/30625H01L21/67092H01L21/7684H10D64/017
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Quick Facts
Patent No.
US 12,685,059
App. No.
17/739,783
Filed
May 9, 2022
Granted
Jul 14, 2026
Kind
B2
Art Unit
2899
USPC
438/592
Abstract

A method of forming a semiconductor device is provided. The method includes forming a first film over an active region of a first side of a semiconductor substrate and a second film over a second side of the semiconductor substrate opposing to the first side of the semiconductor substrate; applying a chemical mechanical polishing to remove at least a portion of the second film; after the chemical mechanical polishing, forming a photoresist layer over the first film; and patterning the photoresist layer using an extreme ultraviolet radiation.

Claims (43)

1 . A method of forming a semiconductor device, the method comprising:

forming a first film over an active region of a first side of a semiconductor substrate and a second film over a second side of the semiconductor substrate opposing to the first side of the semiconductor substrate;

before forming the first film and the second film, forming a third film over the active region over the first side of the semiconductor substrate and a fourth film over the second side of the semiconductor substrate, wherein the third film and the fourth film are formed in a same process;

applying a chemical mechanical polishing to remove at least a portion of the second film;

after applying the chemical mechanical polishing, forming a photoresist layer over the first film; and

patterning the photoresist layer using an extreme ultraviolet radiation.

2 . The method of claim 1 , wherein the first film and the second film are formed in a same process.

3 . The method of claim 1 , wherein the first film and the second film are formed by a thermal growth process or atomic layer deposition.

4 . The method of claim 1 , wherein the first film is a dummy gate layer.

5 . The method of claim 1 , further comprising etching the first film after patterning the photoresist layer.

6 . The method of claim 1 , wherein the first film and the second film comprise polycrystalline silicon, polycrystalline silicon germanium, silicon nitride, silicon oxide, silicon oxynitride, silicon oxygen carbon nitride, silicon carbon nitride, or a combination thereof.

7 . The method of claim 1 , wherein the first film and the second film are formed in a same second process.

8 . The method of claim 1 , further comprising:

forming a fifth film over the first film and a sixth film over the second film before forming the photoresist layer, wherein the fifth film and the sixth film are formed of a same material; and

removing the sixth film before applying the chemical mechanical polishing.

9 . The method of claim 8 , wherein the sixth film is removed by an etching process.

10 . A method of forming a semiconductor device, the method comprising:

forming a plurality of fins over a first side of a semiconductor substrate;

forming a first film over the fins and a second film over a second side of the semiconductor substrate opposing to the first side of the semiconductor substrate;

applying a first chemical mechanical polishing to remove a first thickness from the second film;

applying a second chemical mechanical polishing to remove a second thickness from the first film before patterning the first film, wherein the second thickness is greater than the first thickness; and

patterning the first film.

11 . The method of claim 10 , wherein the first film is a dummy gate material.

12 . The method of claim 11 , wherein the first film and the second film are formed simultaneously.

13 . The method of claim 10 , further comprising forming a third film over the first film and patterning the third film using an extreme ultraviolet radiation after applying the first chemical mechanical polishing.

14 . The method of claim 10 , further comprising:

forming a fourth film over the first film and a fifth film over the second film; and

removing the fifth film before patterning the first film.

15 . The method of claim 10 , wherein the first film is a dummy gate layer.

16 . The method of claim 15 , further comprising replacing the first film with a metal film after patterning the first film.

17 . A method of forming a semiconductor device, comprising:

forming a first film over an active region of a first side of a semiconductor substrate and a second film over a second side of the semiconductor substrate opposing to the first side of the semiconductor substrate in a same process;

applying a first chemical mechanical polishing to planarize the second film;

after applying the first chemical mechanical polishing, patterning the first film to form a dummy gate structure; and

replacing the dummy gate structure with a metal gate structure, wherein a thickness of the second film after being planarized is smaller than a thickness of the metal gate structure.

18 . The method of claim 17 , further comprising forming a patterning layer over the active region and simultaneously forming a backside film over the second side of the semiconductor substrate before forming the first film, and patterning the substrate using the patterning layer as an etch mask.

19 . The method of claim 17 , wherein replacing the dummy gate structure comprises:

forming spacers adjacent to the dummy gate structure;

removing the dummy gate structure to form an opening defined by the spacers;

depositing a metal film in the opening and over the spacers;

applying a second chemical mechanical polishing to remove a portion of the metal film over the spacers; and

recessing the metal film in the opening.

20 . The method of claim 17 , wherein patterning the first film comprises defining a pattern of the dummy gate structure by an extreme ultraviolet radiation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2022
From: HU, PO-WEI; NIEN, PO-CHIN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 059872/0983 →
Continuity (3)
Provisional Application 63266113 · Dec 29, 2021
Provisional Application 63278579 · Nov 12, 2021
Related Publication 20230154762A1 · May 18, 2023
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