Multi-domain RC clamp circuit
A multi-domain RC clamp circuit. A circuit is provided that includes a first power domain having a first RC clamp with a first transistor arranged to bypass a first resistor of the first RC clamp; and a second power domain having a second RC clamp with a second transistor arranged to bypass a second resistor of the second RC clamp, wherein the second transistor is controlled by a first input from the first power domain and the first transistor is controlled by a second input from the second power domain.
1 . A circuit, comprising:
a first power domain having a first RC clamp with a first transistor arranged to bypass a first resistor of the first RC clamp; and
a second power domain having a second RC clamp with a second transistor arranged to bypass a second resistor of the second RC clamp,
wherein the second transistor is controlled by a first input from the first power domain and the first transistor is controlled by a second input from the second power domain.
2 . The circuit of claim 1 , wherein the first transistor and the second transistor comprise n-type field effect transistors.
3 . The circuit of claim 2 , wherein the second input is coupled to a gate of the first transistor, and wherein presence of an established power supply at the gate disables the first RC clamp.
4 . The circuit of claim 2 , wherein the first input is coupled to a gate of the second transistor, and wherein presence of an established power supply at the gate disables the second RC clamp.
5 . The circuit of claim 1 , further comprising at least one additional power domain, each having an additional RC clamp with an additional transistor arranged to bypass an additional resistor in the additional RC clamp.
6 . The circuit of claim 5 , wherein the additional transistor is controlled by the first input from the first power domain.
7 . The circuit of claim 5 , wherein the at least one additional power domain includes a first additional transistor controlled by the first power domain and second additional transistor controlled by the second power domain.
8 . The circuit of claim 1 , wherein the first RC clamp includes the first resistor and a capacitor arranged in series with a node therebetween, and an inverter and a metal oxide semiconductor field effect transistor coupled to the node in series.
9 . An integrated circuit, comprising:
a first power domain having a first RC clamp with a first transistor arranged to bypass a first resistor of the first RC clamp, the first RC configured to protect a first system in the first power domain; and
a second power domain having a second RC clamp with a second transistor arranged to bypass a second resistor of the second RC clamp, the second RC clamp configured to protect a second system in the second power domain,
wherein the second transistor is controlled by a first input from the first power domain and the first transistor is controlled by a second input from the second power domain.
10 . The integrated circuit of claim 9 , wherein the first transistor and the second transistor comprise n-type field effect transistors.
11 . The integrated circuit of claim 10 , wherein the second input is coupled to a gate of the first transistor, and wherein presence of an established power supply at the gate disables the first RC clamp.
12 . The integrated circuit of claim 10 , wherein the first input is coupled to a gate of the second transistor, and wherein presence of an established power supply at the gate disables the second RC clamp.
13 . The integrated circuit of claim 9 , further comprising at least one additional power domain, each having an additional RC clamp with an additional transistor arranged to bypass an additional resistor in the additional RC clamp.
14 . The integrated circuit of claim 13 , wherein the additional transistor is controlled by the first input from the first power domain.
15 . The integrated circuit of claim 13 , wherein the at least one additional power domain includes a first additional transistor controlled by the first power domain and second additional transistor controlled by the second power domain.
16 . The integrated circuit of claim 9 , wherein the first RC clamp includes the first resistor and a capacitor arranged in series with a node therebetween, and an inverter and metal oxide semiconductor field effect transistor coupled to the node in series.
17 . The integrated circuit of claim 9 , wherein the first system comprises a power supply.
18 . A circuit, comprising:
a first power domain having a first power supply; and
a second power domain having an RC clamp with a transistor arranged to bypass a resistor of the RC clamp,
wherein the transistor is controlled by a power supply input from the first power domain.
19 . The circuit of claim 18 , wherein the RC clamp is configured to protect a power supply in the second power domain.
20 . The circuit of claim 18 , wherein the transistor comprises an n-type field effect transistor, wherein the power supply input is coupled to a gate of the transistor, and wherein presence of an established power supply at the gate disables the RC clamp.