IP Library › Granted Patent US 12,727,170
Granted Patent B2
US 12,727,170 · App. 18/447,196 · Granted Sep 1, 2026

Semiconductor device and method of manufacturing the semiconductor device

Inventor: Woo Tae Lee (Icheon, KR)
Assignee: SK hynix Inc.
H10B63/80
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Quick Facts
Patent No.
US 12,727,170
App. No.
18/447,196
Granted
Sep 1, 2026
Kind
B2
Abstract

A semiconductor device may include a word line that extends in a first direction, a bit line that extends in a second direction that intersects the first direction, a variable resistance pattern that is disposed between the word line and the bit line and that has a first width in the first direction and a second width in the second direction, wherein the first width and the second width are different from each other, and an electrode pattern that is disposed between the variable resistance pattern and the bit line and that has a third width in the first direction and a fourth width in the second direction, wherein the third width and the fourth width are different from each other.

Claims (20)

1 . A semiconductor device comprising:

a word line that extends in a first direction;

a bit line that extends in a second direction that intersects the first direction;

a variable resistance pattern disposed between the word line and the bit line in a third direction that is perpendicular to the first and the second directions, the variable resistance pattern having a first width in the first direction and a second width in the second direction, wherein the first width and the second width are different from each other; and

an electrode pattern disposed between the variable resistance pattern and the bit line in the third direction, the electrode pattern having a third width in the first direction and a fourth width in the second direction, wherein the third width and the fourth width are different from each other.

2 . The semiconductor device of claim 1 , further comprising first liner patterns disposed on sidewalls of the variable resistance pattern that face the first liner patterns in the second direction.

3 . The semiconductor device of claim 1 , further comprising second liner patterns disposed on sidewalls of the electrode pattern that face the second liner patterns in the first direction.

4 . The semiconductor device of claim 1 , wherein the word line has a high level, a middle level, and a low level in the third direction, the middle level disposed between the high level and the low level, the word line having a seventh width at the high level, an eighth width at the middle level, and a ninth width at the low level.

5 . The semiconductor device of claim 4 , wherein the eighth width is smaller than the seventh width.

6 . The semiconductor device of claim 4 , wherein the ninth width is greater than the seventh width.

7 . The semiconductor device of claim 1 , wherein the second width is smaller than the first width.

8 . The semiconductor device of claim 1 , wherein the third width is smaller than the fourth width.

9 . The semiconductor device of claim 1 , further comprising a switching pattern disposed between the word line and the variable resistance pattern in the third direction, the switching pattern having a fifth width in the first direction and a sixth width in the second direction, wherein the sixth width is smaller than the fifth width.

10 . The semiconductor device of claim 9 , further comprising third liner patterns disposed on sidewalls of the switching pattern that face the third liner patterns in the second direction.

11 . The semiconductor device of claim 1 , wherein the electrode pattern comprises:

a first part having the third width in the first direction and the fourth width in the second direction; and

a second part having a tenth width in the first direction and an eleventh width in the second direction,

wherein the first part is disposed on the second part in the third direction.

12 . The semiconductor device of claim 11 , wherein the tenth width is substantially identical with the eleventh width.

13 . The semiconductor device of claim 1 , further comprising fourth liner patterns disposed on sidewalls of the word line that face the fourth liner patterns in the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2023
From: LEE, WOO TAE
To: SK HYNIX INC.
Reel/Frame 064551/0629 →
Priority Claims (1)
KR 10-2023-0045254 · Apr 6, 2023 · national
Continuity (1)
Related Publication 20240341104A1 · Oct 10, 2024
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