Semiconductor device and method of manufacture
A device includes a fin extending from a substrate; a gate stack over and along sidewalls of the fin; a gate spacer along a sidewall of the gate stack; an epitaxial source/drain region in the fin and adjacent the gate spacer, the epitaxial source/drain region including a first epitaxial layer on the fin, the first epitaxial layer including silicon and arsenic; and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including silicon and phosphorus, the first epitaxial layer separating the second epitaxial layer from the fin; and a contact plug on the second epitaxial layer.
1 . A method comprising:
depositing a dummy gate over and along sidewalls of a fin extending upwards from a substrate;
forming a gate spacer along a sidewall of the dummy gate;
forming a recess in the fin adjacent the gate spacer; and
forming a source/drain region in the recess, the forming of the source/drain region comprising:
epitaxially growing a first doped silicon layer lining the recess, wherein the first doped silicon layer is doped with arsenic, wherein portions of the first doped silicon layer near a top of the recess have a first thickness, wherein portions of the first doped silicon layer near a bottom of the recess have a second thickness that is greater than the first thickness; and
epitaxially growing a second doped silicon layer on the first doped silicon layer, wherein the second doped silicon layer is doped with phosphorus, and wherein the source/drain region has a doping transition length in a range of 7 nm to 15 nm, wherein the doping transition length is defined as a distance from an interface between the source/drain region and a channel region to a position in the channel region at which a total dopant concentration is less than 1E10 18 atoms/cm 3 .
2 . The method of claim 1 , wherein epitaxially growing the first doped silicon layer comprises using a first chemical vapor deposition (CVD) process, and wherein epitaxially growing the second doped silicon layer comprises using a second CVD process.
3 . The method of claim 1 , wherein the first thickness is in a range of 1 nm to 6 nm.
4 . The method of claim 1 , wherein the second thickness is in a range of 1 nm to 12 nm.
5 . The method of claim 1 , further comprising forming a conductive feature on the second doped silicon layer, wherein the conductive feature is separated from the first doped silicon layer.
6 . The method of claim 1 , wherein a portion of the second doped silicon layer is free of arsenic.
7 . The method of claim 1 , wherein a concentration of phosphorus in the second doped silicon layer is greater than a concentration of arsenic in the first doped silicon layer.
8 . A method comprising:
etching a recess in a semiconductor fin, wherein the recess is adjacent a channel region of the semiconductor fin; and
forming a source/drain region in the recess and having a doping transition length in a range of 7 nm to 15 nm, wherein the doping transition length is defined as a distance from an interface between the source/drain region and the channel region to a position in the channel region at which a total dopant concentration is less than 1E10 18 atoms/cm 3 , wherein forming the source/drain region comprises:
performing a first epitaxial growth process to form a first epitaxial layer on surfaces of the recess, wherein the first epitaxial layer comprises a first n-type dopant, wherein the first epitaxial layer has a region of maximum concentration of the first n-type dopant that is separated from upper surfaces of the first epitaxial layer by a nonzero first distance;
performing a second epitaxial growth process to form a second epitaxial layer on the first epitaxial layer, wherein the second epitaxial layer comprises a second n-type dopant that has a larger diffusivity than the first n-type dopant, the second epitaxial growth process does not use any precursor that comprises the first n-type dopant to form the second epitaxial layer; and
after performing the second epitaxial growth process, diffusing the first n-type dopant from the first epitaxial layer into the second epitaxial layer.
9 . The method of claim 8 , wherein the first n-type dopant is arsenic and the second n-type dopant is phosphorus.
10 . The method of claim 8 , wherein after diffusing the first n-type dopant from the first epitaxial layer into the second epitaxial layer, a concentration of the second n-type dopant in a second region of the first epitaxial layer is greater than a concentration of the first n-type dopant in a second region of the first epitaxial layer.
11 . The method of claim 8 , wherein the second epitaxial layer is separated from the surfaces of the recess by the first epitaxial layer.
12 . The method of claim 8 , wherein the region of maximum concentration of the first n-type dopant is separated from the surfaces of the recess by a nonzero second distance, and wherein the region of the maximum concentration of the first n-type dopant is located between a bottom of the first epitaxial layer and the second epitaxial layer.
13 . The method of claim 8 , wherein the first epitaxial growth process comprises a chemical vapor deposition (CVD) process that is different than the second epitaxial growth process.
14 . The method of claim 8 , wherein after diffusing the first n-type dopant from the first epitaxial layer into the second epitaxial layer, a concentration of the first n-type dopant in a first region of the first epitaxial layer is greater than a concentration of the second n-type dopant in the first region of the first epitaxial layer and a concentration of the first n-type dopant in a second region of the first epitaxial layer is less than a concentration of the second n-type dopant in the second region of the first epitaxial layer.
15 . A method comprising:
forming a fin protruding from a semiconductor substrate;
forming a source/drain region in the fin, comprising:
forming a recess in the fin, wherein the recess is U-shaped;
forming a conformal layer of arsenic-doped silicon in the recess, wherein the conformal layer of arsenic-doped silicon has a thickness in a range of 1 nm to 12 nm; and
filling remaining portions of the recess with phosphorus-doped silicon, wherein the maximum concentration of phosphorus in the phosphorus-doped silicon is greater than the maximum concentration of arsenic in the conformal layer of arsenic doped silicon, wherein the phosphorus-doped silicon comprises arsenic, and wherein a concentration of phosphorus in the phosphorus-doped silicon is greater than a concentration of arsenic in the phosphorus-doped silicon; and
forming a contact plug protruding into the phosphorus-doped silicon, wherein the contact plug is separated from the conformal layer of arsenic-doped silicon, wherein the source/drain region has a doping transition length in a range of 7 nm to 15 nm, and wherein the doping transition length is defined as a distance from an interface between the source/drain region and a channel region to a position in the channel region at which a total dopant concentration is less than 1E10 18 atoms/cm 3 .
16 . The method of claim 15 , wherein first portions of the conformal layer of arsenic-doped silicon that are near a top of the recess have a first thickness that is less than a second thickness of second portions of the conformal layer of arsenic-doped silicon that are near the bottom of a recess.
17 . The method of claim 16 , wherein the first thickness is in a range of 1 nm to 6 nm.
18 . The method of claim 16 , wherein the second thickness is in a range of 1 nm to 12 nm.
19 . The method of claim 16 , wherein the conformal layer of arsenic-doped silicon is adjacent a channel region in the fin.
20 . The method of claim 16 , wherein the phosphorus-doped silicon has a first arsenic concentration at a top surface of the phosphorus-doped silicon, wherein the phosphorus-doped silicon has a second arsenic concentration at a position within the phosphorus-doped silicon, wherein the phosphorus-doped silicon has a third arsenic concentration at a bottom of the phosphorus-doped silicon, wherein the position within the phosphorus-doped silicon is between the top surface of the phosphorus-doped silicon and the bottom of the phosphorus-doped silicon, and wherein the first arsenic concentration is between the second arsenic concentration and the third arsenic concentration.