IP Library Granted Patent US 12,740,368
Granted Patent B2
US 12,740,368 · App. 18/511,557 · Granted Sep 15, 2026

Wafer support for measuring wafer geometry

Inventors: Daniel Fulford (Albany, NY); Mark I. Gardner (Austin, TX); H. Jim Fulford (Marianna, FL)
Assignee: Tokyo Electron Limited
H10P72/0616G01B21/20H10P74/203
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Quick Facts
Patent No.
US 12,740,368
App. No.
18/511,557
Granted
Sep 15, 2026
Kind
B2
Abstract

A wafer measurement stage for supporting a semiconductor wafer for surface geometry measurements. The wafer measurement stage includes a support body having a planar surface configured to face a wafer which is supported by the wafer measurement stage, and a wafer contact structure provided on the planar surface. The wafer contact structure is configured to contact a portion of a wafer such that the wafer is supported in an elevated position relative to the planar surface and to control gravity effects at non-contact portions of the wafer.

Claims (31)

1 . A wafer measurement stage for supporting a semiconductor wafer for surface geometry measurements, comprising:

a support body having a planar surface configured to face a wafer which is supported by the wafer measurement stage; and

a wafer contact structure provided on the planar surface, wherein the wafer contact structure is configured to contact a portion of a wafer such that the wafer is supported in an elevated position relative to the planar surface and to control gravity effects at non-contact portions of the wafer,

wherein the wafer contact structure comprises a line of support material which forms a closed shape structure, such as a ring contact structure on the planar surface.

2 . The wafer measurement stage of claim 1 , wherein the planar surface of the support body has a smaller area than a wafer to be supported on the wafer measurement stage.

3 . The wafer measurement stage of claim 1 , wherein the contact structure comprises a plurality of said ring contact structures provided in concentric arrangement on the planar surface.

4 . The wafer measurement stage of claim 1 , wherein the wafer contact structure comprises a plurality of lines of support material provided on the planar surface.

5 . The wafer measurement stage of claim 4 , wherein the plurality of lines of support material do not intersect one another.

6 . The wafer measurement stage of claim 4 , wherein the plurality of lines of support material comprise a plurality of parallel lines of support material.

7 . The wafer measurement stage of claim 5 , wherein the plurality of lines of support material intersect one another.

8 . The wafer measurement stage of claim 1 , wherein the wafer contact structure comprises silicone.

9 . The wafer measurement stage of claim 1 , wherein a cross section of the line of support material has a substantially circular shape.

10 . The wafer measurement stage of claim 1 , wherein a cross section of the line of support material has a substantially rectangular shape having a top support surface and opposing sidewalls which extend from the top support surface to the planar surface of the support body.

11 . The wafer measurement stage of claim 1 , wherein the wafer contact structure comprises a field of support material covering the planar surface.

12 . An apparatus for measuring geometry of a wafer, comprising:

a wafer measurement stage for supporting a semiconductor wafer, the wafer measurement stage comprising:

a support body having a planar surface configured to face a wafer which is supported by the wafer measurement stage, and

a wafer contact structure provided on the planar surface, wherein the wafer contact structure is configured to contact a portion of a wafer such that the wafer is supported in an elevated position relative to the planar surface and to control gravity effects at non-contact portions of the wafer,

wherein the wafer contact structure comprises a line of support material which forms a closed shape structure, such as a ring contact structure on the planar surface; and

a metrology tool configured to measure geometry of a wafer resting on the wafer measurement stage.

13 . The apparatus of claim 12 , wherein the metrology tool is configured to measure wafer geometry using at least one of optical, acoustic, and capacitive mechanisms to measure the z-height deviations across a surface of the wafer.

14 . The apparatus of claim 12 , further comprising a processing unit including a processor and a memory for storing software which, when executed by the processor, mathematically removes at least a portion of gravity effects from a measured geometry of a wafer resting on the wafer measurement stage.

15 . The apparatus of claim 14 , wherein the memory stores data correlated to gravity effects on said non-contact portions of the wafer for use in mathematically removing the gravity effects on said non-contact portions of the wafer resting on the wafer measurement stage.

16 . A method of measuring wafer geometry comprising:

providing a wafer on a measurement stage comprising:

a support body having a planar surface configured to face a wafer which is supported by the measurement stage, and

a wafer contact structure provided on the planar surface, wherein the wafer contact structure is configured to contact a portion of a wafer such that the wafer is supported in an elevated position relative to the planar surface and to control gravity effects at non-contact portions of the wafer,

wherein the wafer contact structure comprises a line of support material which forms a closed shape structure, such as a ring contact structure, on the planar surface; and

measuring a geometry of the wafer resting on the wafer measurement stage.

17 . The method of claim 16 , further comprising mathematically removing gravity effects from a geometry measurement obtained from said measuring a geometry.

18 . The method of claim 17 , wherein said mathematically removing comprises removing gravity effects on said non-contact portions of the wafer resting on the wafer measurement stage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2023
From: FULFORD, MARK; GARDNER, MARK I.; FULFORD, H. JIM
To: TOKYO ELECTRON LIMITED
Reel/Frame 065589/0482 →
Continuity (1)
Related Publication 20250167024A1 · May 22, 2025
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