IP Library › Granted Patent US 12,740,384
Granted Patent B2
US 12,740,384 · App. 18/372,712 · Granted Sep 15, 2026

Metal interconnect structure and method for fabricating the same

Inventors: Da-Jun Lin (Kaohsiung City, TW); Bin-Siang Tsai (Changhua County, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10W20/049H10W20/035H10W20/056H10W20/062H10W20/081H10W20/42H10W20/425
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Quick Facts
Patent No.
US 12,740,384
App. No.
18/372,712
Granted
Sep 15, 2026
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.

Claims (15)

1 . A method for fabricating semiconductor device, comprising:

forming a dielectric layer on a substrate;

forming a trench in the dielectric layer;

forming a second liner in the trench;

forming a third liner on the second liner, wherein the second liner and the third liner comprise different thicknesses and different materials;

performing an anneal process to transform the second liner and the third liner into a first liner in the trench, wherein the first liner comprises Co—Ru alloy;

forming a metal layer on the first liner, wherein the Co—Ru alloy contacts the metal layer directly; and

planarizing the metal layer and the first liner to form a metal interconnection.

2 . The method of claim 1 , further comprising forming a barrier layer in the trench before forming the first liner.

3 . The method of claim 2 , wherein the barrier layer comprises titanium nitride (TiN).

4 . The method of claim 1 , further comprising performing the anneal process to form the first liner on the second liner.

5 . The method of claim 1 , further comprising performing the anneal process to form the first liner between the second liner and the third liner.

6 . The method of claim 1 , further comprising performing the anneal process after forming the metal layer.

7 . The method of claim 1 , wherein the second liner and the third liner are selected from the group consisting of cobalt (Co) and ruthenium (Ru).

8 . The method of claim 1 , wherein the metal layer comprises copper (Cu).

Priority Claims (1)
TW 107117189 · May 21, 2018 · national
Continuity (3)
Continuation 17195648 · Mar 9, 2021
Division 16011615 · Jun 18, 2018
Related Publication 20240014069A1 · Jan 11, 2024
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