IP Library › Granted Patent US 12,740,456
Granted Patent B2
US 12,740,456 · App. 18/452,566 · Granted Sep 15, 2026

Stacked wiring structure having first and second wiring substrate electrically connected by first and second conductive through vias

Inventors: Tai-Jui Wang (Kaohsiung City, TW); Jui-Wen Yang (New Taipei City, TW); Chieh-Wei Feng (Taoyuan City, TW); Chih Wei Lu (Taoyuan City, TW); Hsien-Wei Chiu (Taoyuan City, TW)
Assignee: Industrial Technology Research Institute
H10W70/685H10W70/095H10W70/635H10W70/65H10W70/692H10W90/701
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Quick Facts
Patent No.
US 12,740,456
App. No.
18/452,566
Granted
Sep 15, 2026
Kind
B2
Abstract

A stacked wiring structure includes a first wiring substrate and a second wiring substrate. The first wiring substrate includes a first glass substrate, multiple first conductive through vias penetrating through the first glass substrate, and a first multi-layered redistribution wiring structure disposed on the first glass substrate. The second wiring substrate includes a second glass substrate, multiple second conductive through vias penetrating through the second glass substrate, and a second multi-layered redistribution wiring structure disposed on the second glass substrate. The first conductive through vias are electrically connected to the second conductive through vias. The first glass substrate is spaced apart from the second glass substrate. The first multi-layered redistribution wiring structure is spaced apart from the second multi-layered redistribution wiring structure by the first glass substrate and the second glass substrate.

Claims (26)

1 . A stacked wiring structure, comprising:

a first wiring substrate, comprising a first glass substrate, a plurality of first conductive through vias penetrating through the first glass substrate, and a first multi-layered redistribution wiring structure disposed on the first glass substrate; and

a second wiring substrate, comprising a second glass substrate, a plurality of second conductive through vias penetrating through the second glass substrate, and a second multi-layered redistribution wiring structure disposed on the second glass substrate, wherein the first conductive through vias are electrically connected to the second conductive through vias, the first glass substrate is spaced apart from the second glass substrate, and the first multi-layered redistribution wiring structure is spaced apart from the second multi-layered redistribution wiring structure by the first glass substrate and the second glass substrate, wherein

the first multi-layered redistribution wiring structure further comprises a first stress control layer, and the first stress control layer is disposed on the first glass substrate, in the first multi-layered redistribution wiring structure and/or on the first multi-layered redistribution wiring structure, and

the second multi-layered redistribution wiring structure further comprises a second stress control layer, and the second stress control layer is disposed on the second glass substrate, in the second multi-layered redistribution wiring structure and/or on the second multi-layered redistribution wiring structure.

2 . The stacked wiring structure according to claim 1 , wherein the first wiring substrate further comprises a plurality of first pads, the second wiring substrate further comprises a plurality of second pads, and the first pads are connected to the second pads, so that the first glass substrate is spaced apart from the second glass substrate by a gap.

3 . The stacked wiring structure according to claim 1 , wherein

the first multi-layered redistribution wiring structure comprises a plurality of first dielectric layers and a plurality of first redistribution conducting wires between the first dielectric layers, and

the second multi-layered redistribution wiring structure comprises at least one second dielectric layer, a plurality of second redistribution conducting wires, and a flat layer covering the first dielectric layers and the first redistribution conducting wires.

4 . The stacked wiring structure according to claim 3 , wherein

the first multi-layered redistribution wiring structure further comprises a first etch stop layer, the first etch stop layer is disposed between the first dielectric layers and the first glass substrate, the second multi-layered redistribution wiring structure further comprises a second etch stop layer, and the second etch stop layer is disposed between the second dielectric layers and the second glass substrate.

5 . The stacked wiring structure according to claim 3 , further comprising:

a control chip, disposed on the second multi-layered redistribution wiring structure, wherein the first multi-layered redistribution wiring structure further comprises an antenna, and the antenna is disposed between the first dielectric layers.

6 . The stacked wiring structure according to claim 1 , wherein the first stress control layer is spaced apart from the second stress control layer.

7 . The stacked wiring structure according to claim 1 , further comprising a heater, wherein the heater is disposed in the first wiring substrate.

8 . The stacked wiring structure according to claim 1 , further comprising a passive device, wherein the passive device is disposed in the first wiring substrate.

9 . The stacked wiring structure according to claim 1 , further comprising a plurality of solder balls, wherein the solder balls are electrically connected between the first conductive through vias and the second conductive through vias, so that the first glass substrate is spaced apart from the second glass substrate by a gap.

10 . A stacked wiring structure, comprising:

a first wiring substrate, comprising an organic substrate, a plurality of conducting wires penetrating through the organic substrate, and a first multi-layered redistribution wiring structure disposed on the organic substrate; and

a second wiring substrate, comprising a glass substrate, a plurality of conductive through vias penetrating through the glass substrate, and a second multi-layered redistribution wiring structure disposed on the glass substrate, wherein the conducting wires are electrically connected to the conductive through vias, and the organic substrate is spaced apart from the glass substrate, wherein the second multi-layered redistribution wiring structure further comprises a stress control layer disposed on a surface of the glass substrate, and the surface of the glass substrate where the stress control layer faces the first wiring substrate.

11 . The stacked wiring structure according to claim 10 , further comprising a probe head with a probe, wherein the probe head is disposed above the second wiring substrate.

12 . The stacked wiring structure according to claim 10 , wherein the first wiring substrate further comprises a plurality of first pads, the second wiring substrate further comprises a plurality of second pads, and the first pads are connected to the second pads, so that the organic substrate is spaced apart from the glass substrate by a gap.

13 . The stacked wiring structure according to claim 10 , wherein the first multi-layered redistribution wiring structure comprises at least one first dielectric layer and a plurality of first redistribution conducting wires.

14 . The stacked wiring structure according to claim 10 , wherein the stress control layer comprises a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, an aluminum oxide layer, or a magnesium oxide layer.

15 . The stacked wiring structure according to claim 10 , further comprising a heater, wherein the heater is disposed in the second wiring substrate.

16 . The stacked wiring structure according to claim 10 , further comprising a passive device, wherein the passive device is disposed in the first wiring substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2023
From: WANG, TAI-JUI; YANG, JUI-WEN; FENG, CHIEH-WEI; LU, CHIH WEI; CHIU, HSIEN-WEI
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 064715/0468 →
Priority Claims (1)
TW 112123009 · Jun 19, 2023 · national
Continuity (2)
Provisional Application 63404548 · Sep 8, 2022
Related Publication 20240088004A1 · Mar 14, 2024
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