Signal shielding for integrated circuits
Some embodiments relate to an IC device, including a first chip; and a second chip bonded to the first chip at a bonding interface; where the first and second chips respectively comprise a first dielectric layer and a second dielectric layer directly contacting; the first chip further comprises a plurality of conductive pads recessed into the first dielectric layer and in a plurality of rows and columns; where the plurality of conductive pads are arranged with a zig-zag layout along the plurality of columns and along the plurality of rows and comprise a first conductive pad and a second conductive pad; the first chip further comprises a first shield line in the first dielectric layer and laterally between the first and second conductive pads, and the second chip further comprises a contact recessed into the second dielectric layer and directly contacting the first conductive pad at the bonding interface.
1 . A method of forming an integrated circuit (IC) device, comprising:
forming a first interconnect structure of a first IC chip;
forming a plurality of conductive pads over and electrically coupled to the first interconnect structure and further surrounded by a first dielectric layer;
forming a plurality of dummy pads isolated from the first interconnect structure between the plurality of conductive pads;
forming a plurality of shield lines in the first dielectric layer, between the plurality of conductive pads;
forming a second interconnect structure of a second IC chip;
forming a plurality of bond contacts in a second dielectric layer, over and electrically coupled to the second interconnect structure; and
bonding the first IC chip to the second IC chip, wherein the first dielectric layer and the second dielectric layer directly contact at a bonding interface and wherein the plurality of bond contacts respectively and directly contact the plurality of conductive pads at the bonding interface;
wherein the plurality of conductive pads are arranged with a zig-zag layout along a plurality of columns and along a plurality of rows, and wherein from a cross-sectional view along a first direction, a first conductive pad in a first row of the plurality of rows is separated from a second conductive pad in the first row by two shield lines of the plurality of shield lines and a dummy pad of the plurality of dummy pads.
2 . The method of claim 1 , wherein the second conductive pad is the closest conductive pad to the first conductive pad in the first row and in the first direction.
3 . The method of claim 1 , wherein the plurality of dummy pads are at the bonding interface and are evenly spaced between the plurality of conductive pads, wherein a first dummy pad of the plurality of dummy pads is substantially equidistant from four conductive pads of the plurality of conductive pads, and wherein a first pair of the four conductive pads is spaced from the first dummy pad by two shield lines in the first direction, and wherein a second pair of the four conductive pads is spaced from the first dummy pad in a second direction perpendicular to the first direction and spaced from the plurality of shield lines in the first direction.
4 . The method of claim 1 , wherein the plurality of shield lines and the plurality of dummy pads are concurrently formed with the plurality of conductive pads, wherein the plurality of shield lines space the plurality of columns, and wherein the plurality of columns comprise both the plurality of conductive pads and the plurality of dummy pads in the first direction.
5 . The method of claim 1 , wherein the first row of the plurality of rows that has the first conductive pad extends parallel to the first direction, wherein conductive pads and dummy pads are alternately positioned along the first row, and wherein in a first column having the first conductive pad and extending parallel to a second direction that is perpendicular to the first direction, conductive pads and dummy pads are alternately positioned along the first column.
6 . The method of claim 5 , wherein the dummy pads in the first column are spaced from dummy pads in a second column by a first shield line.
7 . The method of claim 5 , further comprising forming a plurality of photodetectors in a substrate before forming the first interconnect structure over the substrate, wherein the plurality of photodetectors are arranged in a pixel block of a pixel block row extending in the first direction, wherein the first row and a second row of the plurality of rows of the plurality of conductive pads extend over the pixel block, and wherein the first conductive pad of the first row is coupled to the pixel block while a first dummy pad of the second row overlies the pixel block and is isolated from the first interconnect structure.
8 . The method of claim 5 , wherein the plurality of shield lines extend in the second direction between the columns and are spaced in the first direction by the columns.
9 . A method of forming an integrated device, comprising:
forming a first interconnect structure on a first substrate comprising a plurality of wires separated by a first dielectric layer;
forming a plurality of conductive pads on the first dielectric layer in a plurality of rows extending in a first direction and a plurality of columns extending in a second direction perpendicular to the first direction;
forming a plurality of dummy pads isolated from the first interconnect structure between the plurality of conductive pads;
forming a first plurality of shield lines in the first dielectric layer extending between conductive pads of the plurality of conductive pads, wherein from a cross-sectional view along the first direction, a first conductive pad in a first row of the plurality of rows is separated from a second conductive pad in the first row by two shield lines of the first plurality of shield lines and a dummy pad of the plurality of dummy pads;
forming a plurality of bond contacts in a second dielectric layer on a second substrate; and
bonding the plurality of conductive pads to the plurality of bond contacts at a bonding interface.
10 . The method of claim 9 , further comprising:
forming a second plurality of shield lines in the second dielectric layer, wherein the second plurality of shield lines are level with the plurality of bond contacts; and
bonding the first plurality of shield lines to the second plurality of shield lines concurrently with bonding the plurality of conductive pads to the plurality of bond contacts.
11 . The method of claim 10 , wherein after the first plurality of shield lines are bonded to the second plurality of shield lines, a first shield line of the first plurality of shield lines is a first distance in the first direction from a first conductive pad, a second shield line of the second plurality of shield lines that is bonded to the first shield line is a second distance in the first direction from a bond contact bonded to the first conductive pad, and the first distance is less than the second distance.
12 . The method of claim 9 , wherein the plurality of dummy pads are formed concurrently with the plurality of conductive pads.
13 . The method of claim 12 , wherein the plurality of dummy pads are positioned between the plurality of conductive pads in the plurality of rows and the plurality of columns, resulting in a conductive pad of a first row of the plurality of rows being separated from a nearest conductive pad in the first row by a first dummy pad of the plurality of dummy pads and first and second shield lines of the first plurality of shield lines that extend across the first row.
14 . The method of claim 9 , further comprising:
forming a plurality of photodetectors in the first substrate before forming the first interconnect structure; and
forming a plurality of floating diffusion nodes and transfer transistors at a first side of the first substrate, wherein the transfer transistors respectively couple the plurality of photodetectors to floating diffusion nodes of the plurality of floating diffusion nodes, wherein the first interconnect structure is coupled to the plurality of floating diffusion nodes, wherein a first conductive pad of the plurality of conductive pads is coupled to the plurality of floating diffusion nodes by the first interconnect structure, and wherein a first dummy pad of the plurality of dummy pads is laterally aligned with a floating diffusion node that is coupled to the first conductive pad.
15 . A method of forming an integrated device, comprising:
forming a plurality of photodetectors in a substrate;
forming a plurality of floating diffusion nodes between the plurality of photodetectors in the substrate comprising a first floating diffusion node and a second floating diffusion node;
forming an interconnect structure over the substrate and coupled to the plurality of floating diffusion nodes;
forming a plurality of conductive pads coupled to the interconnect structure, wherein the plurality of conductive pads respectively lie within pixel blocks of a plurality of pixel blocks in a first pixel block row extending in a first direction, and wherein the plurality of conductive pads comprise a first conductive pad that is coupled to the first floating diffusion node and the second floating diffusion node by the interconnect structure;
forming a plurality of dummy pads isolated from the interconnect structure between the plurality of conductive pads;
forming a first plurality of shield lines concurrently with the plurality of conductive pads and extending between the pixel blocks in the first pixel block row; and
bonding the plurality of conductive pads to a plurality of bond contacts on a second substrate, wherein from a cross-sectional view along the first direction, a first conductive pad in a first row of a plurality of rows is separated from a second conductive pad in the first row by two shield lines of the first plurality of shield lines and a dummy pad of the plurality of dummy pads.
16 . The method of claim 15 , wherein the plurality of dummy pads comprises a first dummy pad directly over the second floating diffusion node and isolated from the interconnect structure, wherein the plurality of conductive pads and the plurality of dummy pads extend in a first pad row and a second pad row aligned with the first pixel block row and extending in the first direction, wherein the plurality of dummy pads alternate between being positioned in the first pad row and the second pad row along a length of the first pixel block row, and wherein the plurality of conductive pads alternate between being positioned in the first pad row and the second pad row along the length of the first pixel block row, resulting in conductive pads in the first pixel block row that are closest to the first conductive pad being in a different pad row from the first conductive pad.
17 . The method of claim 15 , wherein the first conductive pad is within a first pixel block of the first pixel block row, wherein a second conductive pad is within a second pixel block of the first pixel block row, and wherein the first conductive pad and the second conductive pad are respectively formed off-center from centers of the first pixel block and the second pixel block in a second direction perpendicular to the first direction, resulting in the first conductive pad and the second conductive pad being spaced in the first direction and the second direction.
18 . The method of claim 15 , wherein the pixel blocks comprise 2-by-4 arrays of photodetectors, and wherein a 2-by-2 subarray is coupled to the first floating diffusion node and a second 2-by-2 subarray is coupled to the second floating diffusion node, wherein the first conductive pad is directly over the first floating diffusion node, and wherein the first conductive pad is spaced from the second floating diffusion node in a second direction perpendicular to the first direction.
19 . The method of claim 18 , wherein the plurality of conductive pads of the first pixel block row are coupled to multiple floating diffusion nodes, and are positioned directly over floating diffusion nodes laterally aligned with alternating pad rows.
20 . The method of claim 19 , wherein the plurality of dummy pads are arranged in two pad rows within the first pixel block row that extend parallel to the first direction, and wherein the plurality of dummy pads are positioned directly over floating diffusion nodes that are laterally aligned with alternating pad rows of the two pad rows.