System and method for measuring a high speed signal
View Patent ↗An apparatus is provided for measuring an output of a high-speed data transmission circuit. The apparatus includes a programmable reference voltage generator operable to generate a reference voltage that is variable between a plurality of levels. The apparatus also includes a quantizer to quantize an output of the high-speed data transmission circuit relative to the reference voltage level input thereto. Also included is a clock generator operable to generate a clock having a transitioning time (rise-time, fall-time or both) that is less than one quarter of a minimum switching period of the output of the circuit. Finally, the apparatus includes a sampler operable to sample the quantized output with the clock to produce a plurality of samples which measure the output of the circuit.
1. A method of measuring an output of a high-speed data transmission circuit, comprising:
operating the high-speed data transmission circuit;
quantizing an output of the circuit relative to a variable reference voltage;
sampling said quantized output with a clock having a transitioning time which is less than one quarter of a minimum switching period of the output of the circuit; and
varying said variable reference voltage during said quantizing and varying said clock during said sampling to obtain a plurality of samples which measure the output of the circuit.
2. The method of claim 1 wherein said variable reference voltage is varied during said quantizing between a plurality of levels between a minimum level and a peak level of the output of the circuit.
3. The method of claim 2 wherein an edge of said clock is varied during said sampling between a plurality of phases of a signal period of the output of the circuit.
4. The method of claim 3 wherein said clock samples said quantized output at a rate which is slower than a maximum switching rate of the output of the circuit.
5. The method of claim 4 wherein said sampling rate is at least twice as slow as said maximum switching rate of the circuit.
6. The method of claim 2 further comprising detecting a peak level of the output of the circuit.
7. The method of claim 2 wherein said variable reference voltage is varied linearly between said minimum level and said peak level.
8. The method of claim 1 wherein said quantized output is buffered for output to an external tester.
9. The method of claim 1 wherein all said steps of quantizing the output of the circuit, sampling said quantized output, and varying said reference voltage and said phase of said sampling clock are performed on the same chip on which said high-speed data transmission circuit is located.
10. A method of measuring an output of a high-speed data transmission circuit, comprising:
operating the high-speed data transmission circuit;
quantizing an output of the circuit relative to a variable reference voltage;
sampling said quantized output with a clock having a transitioning time which is less than one quarter of a minimum switching rate of said output of the circuit; and varying said variable reference voltage during said quantizing between a plurality of levels between a minimum level and a peak level of the output of the circuit, and
varying said clock during said sampling between a plurality of phases to obtain a plurality of samples which measure the output of the circuit.
11. An apparatus for measuring an output of a high-speed data transmission circuit, comprising:
a programmable reference voltage generator operable to generate a reference voltage that is variable between a plurality of levels;
a quantizer operable to quantize an output of the high-speed data transmission circuit relative to a level of said plurality of reference voltage levels;
a clock generator operable to generate a clock having a transitioning time which is less than one quarter of a minimum switching period of the output of the circuit; and
a sampler operable to sample said quantized output with said clock to produce a plurality of samples which measure the output of the circuit.
12. The apparatus of claim 11 wherein said clock generator is further operable to shift an edge of said clock between a plurality of phases such that said quantized output may be sampled at each of said plurality of phases of said clock edge.
13. The apparatus of claim 11 wherein said clock generator is operable to generate said clock at a rate slower than a maximum switching rate of the output of the circuit.
14. The apparatus of claim 13 wherein said rate of said clock is at least twice as slow as said maximum switching rate of the output of the circuit.
15. The apparatus of claim 11 further comprising a set-reset flip-flop coupled to said quantized output, wherein said set-reset flip-flop is operable to detect a peak level of the output of the circuit when said reference voltage is set to a level close to an expected peak level of the output of the circuit.
16. The apparatus of claim 11 wherein said reference voltage generator is operable to linearly vary said reference voltage between said plurality of levels.
17. The apparatus of claim 11 further comprising a buffer amplifier operable to buffer said quantized output for output to an external tester.
18. The apparatus of claim 11 further comprising a first buffer operable to regenerate the output of the circuit at an input to said quantizer.
19. The apparatus of claim 18 further comprising a second buffer operable to regenerate said reference voltage level at an input to said quantizer.