Page buffer architecture for programming, erasing and reading nanoscale resistive memory devices
In the present method of programming and erasing the resistive memory devices of a memory device array, upon a single command, high current is provided in both the program and erase functions to program and erase only those memory devices whose state is to be changed from the previous state.
1. A method of undertaking a procedure on a resistive memory device comprising:
providing data information to a data register;
providing data information from the data register to a latch; and
providing information from the latch to a write driver, the information provided from the latch to the write driver relating to writing data in the memory device.
2. The method of claim 1 and further comprising the write driver writing data in the memory device.
3. The method of claim 2 wherein the writing of data by the write driver changes the resistance of the memory device from a lower to a higher state.
4. The method of claim 3 and further comprising verifying the higher resistance state of the memory device.
5. The method of claim 2 wherein the writing of data by the write driver changes the resistance of the memory device from a higher to a lower state.
6. The method of claim 5 and further comprising verifying the lower resistance state of the memory device.
7. The method of claim 1 wherein, based on the information provided from the latch to the write driver, data is not written in the memory device by the write driver.