Fuse link structures using film stress for programming and methods of manufacture

1. A method of forming a programmable fuse structure, comprising:

forming at least one shallow trench isolation (STI) in a substrate;

forming an e-fuse over the at least one STI;

depositing an interlevel dielectric (ILD) layer over the e-fuse;

removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse; and

removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.

2. The method of claim 1 , wherein the air gap at least one of:

reduces accumulated stress on the e-fuse;

increases a heating rate of the e-fuse during programming;

minimizes heating of neighboring structures; and

minimizes mechanical constraint of the e-fuse.

3. The method of claim 1 , wherein the programmable fuse structure comprises a multi-layer material stack, wherein the e-fuse comprises a material having a different coefficient of thermal expansion (CTE) than a material of the substrate.

4. The method of claim 1 , further comprising providing a metal layer above the ILD layer and contacts in the ILD layer electrically connecting the metal layer and the e-fuse.

5. The method of claim 4 , further comprising providing mechanical anchors for ends of the e-fuse to assist mechanical rupture programming.

6. The method of claim 5 , wherein the mechanical anchors comprise portions of the ILD layer.

7. The method of claim 5 , wherein the mechanical anchors comprise the contacts.

8. The method of claim 4 , further comprising:

depositing a cap layer over the metal layer;

etching an opening in the cap layer;

etching at least a portion of the ILD layer through the opening to remove at least the portion of the ILD layer over the e-fuse; and

etching at least a portion of the at least one STI through the opening to remove at least the portion of the at least one STI under the e-fuse.

9. The method of claim 8 , further comprising depositing a dielectric layer over the cap layer and the opening in the cap layer, wherein the dielectric layer comprises at least one of silicon dioxide, silicon carbide, a low-K material, and an ultra-low-K material.

10. The method of claim 1 , further comprising providing a mechanical hard layer in the at least one STI to absorb stress relaxation resulting from fuse programming.

11. The method of claim 1 , wherein the at least one STI comprises silicon dioxide.

12. The method of claim 1 , wherein the at least one STI comprises silicon dioxide and a silicon nitride/silicon dioxide liner layer.

13. The method of claim 1 , further comprising providing a plateau in the substrate upon which a portion of the e-fuse is formed, which is structured and arranged to provide a stress point for fuse programming.

14. A method of manufacturing a programmable fuse comprising:

forming at least one shallow trench isolation (STI) in a substrate;

forming an e-fuse over the at least one STI;

depositing an interlevel dielectric (ILD) layer over the e-fuse;

removing at least a portion of the ILD layer over the e-fuse to provide an air gap above a portion of the e-fuse;

removing at least a portion of the at least one STI under the e-fuse to provide the air gap below the portion of the e-fuse; and

providing a metal layer above the ILD layer and contacts in the ILD layer electrically connecting the metal layer and the e-fuse.

15. The method of claim 14 , wherein the programmable fuse comprises a multi-layer material stack, wherein the e-fuse comprises a material having a different coefficient of thermal expansion (CTE) than a material of the substrate.

16. The method of claim 14 , wherein the programmable fuse is programmed by:

thermally straining the e-fuse via electrical flow through the metal layer, the contacts and the e-fuse; and

rupturing the e-fuse through the thermal straining to program the programmable fuse.

17. The method of claim 14 , further comprising providing mechanical anchors for ends of the e-fuse to assist mechanical rupture programming, wherein the mechanical anchors comprise at least one of portions of the ILD layer and the contacts.

18. The method of claim 14 , further comprising:

depositing a cap layer over the metal layer;

etching an opening in the cap layer;

etching at least a portion of the ILD layer through the opening to remove at least the portion of the ILD layer over the e-fuse;

etching at least a portion of the at least one STI through the opening to remove at least the portion of the at least one STI under the e-fuse; and

depositing a dielectric layer over the cap layer and the opening in the cap layer, wherein the dielectric layer comprises at least one of silicon dioxide, silicon carbide, a low-K material, and an ultra-low-K material.

19. The method of claim 14 , further comprising providing a plateau in the substrate upon which a portion of the e-fuse is formed, wherein the plateau provides a stress point during the programming.