Apparatus for thermally enhanced semiconductor package
View Patent ↗A semiconductor package includes a semiconductor die having contact pads. An encapsulant is disposed around the semiconductor die, and conductive vias are disposed in the encapsulant. Electrically conductive traces are disposed between the contact pads and conductive vias, a thermally conductive channel is disposed in the encapsulant separate from the conductive vias, and a thermally conductive layer is disposed over an area of heat generation of the semiconductor die. A thermally conductive trace is disposed between the thermally conductive layer and thermally conductive channel. The thermally conductive layer, thermally conductive trace, and thermally conductive channel are electrically isolated from the contact pads of the semiconductor die and the electrically conductive traces. The semiconductor package further comprises broad thermal traces disposed over the encapsulant, and a thermally conductive material interconnecting the broad thermal traces and the thermally conductive layer.
1. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant around the semiconductor die;
forming a completely electrically isolated and thermally conductive via in the encapsulant;
forming a thermally conductive pad over an active surface of the semiconductor die; and
forming a first thermally conductive trace over the active surface of the semiconductor die between the thermally conductive pad and the completely and thermally conductive via to route heat away from the semiconductor die.
2. The method of claim 1 , further including:
forming an electrically conductive via in the encapsulant; and
forming a signal trace over the active surface of the semiconductor die between the electrically conductive via and a contact pad of the semiconductor die.
3. The method of claim 2 , wherein the completely electrically isolated and thermally conductive via and the electrically conductive via are disposed in a row.
4. The method of claim 1 , further including:
forming a broad thermal trace in the encapsulant; and
forming a second thermally conductive trace over the active surface of the semiconductor die between the thermally conductive pad and the broad thermal trace.
5. The method of claim 1 , further including forming a heat sink over the semiconductor die.
6. The method of claim 1 , further including:
stacking a plurality of semiconductor die; and
thermally connecting the stacked semiconductor die through the completely electrically isolated and thermally conductive via.
7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a completely electrically isolated and thermally conductive channel around a portion of the semiconductor die; and
forming a thermally conductive trace between a location on a surface of the semiconductor die and the completely electrically isolated and thermally conductive channel.
8. The method of claim 7 , further including:
depositing an encapsulant around the semiconductor die;
forming an electrically conductive via in the encapsulant; and
forming a signal trace over the surface of the semiconductor die between the electrically conductive via and a contact pad of the semiconductor die.
9. The method of claim 7 , further including forming a thermally conductive pad over a hot spot on the surface of the semiconductor die.
10. The method of claim 7 , further including forming a heat sink over the semiconductor die.
11. The method of claim 7 , further including:
stacking a plurality of semiconductor die; and
thermally connecting the stacked semiconductor die through the completely electrically isolated and thermally conductive channel.
12. A method of making a semiconductor device, comprising:
providing a semiconductor die;
disposing a completely electrically isolated and thermally conductive structure around a portion of the semiconductor die; and
disposing a first thermally conductive trace between a location on a surface of the semiconductor die and the completely electrically isolated and thermally conductive structure.
13. The method of claim 12 , wherein the completely electrically isolated and thermally conductive structure includes a completely electrically isolated and thermally conductive via or completely electrically isolated and thermally conductive channel.
14. The method of claim 12 , further including disposing a thermally conductive pad over the surface of the semiconductor die.
15. The method of claim 12 , further including:
depositing an encapsulant around the semiconductor die;
forming an electrically conductive via in the encapsulant; and
disposing a signal trace over the surface of the semiconductor die between the electrically conductive via and a contact pad of the semiconductor die.
16. The method of claim 12 , further including disposing a heat sink over the semiconductor die.
17. The method of claim 12 , further including:
stacking a plurality of semiconductor die; and
thermally connecting the stacked semiconductor die through the completely electrically isolated and thermally conductive structure.
18. The method of claim 12 , further including:
disposing a broad thermal trace around a portion of the semiconductor die; and
disposing a second thermally conductive trace between the location on the surface of the semiconductor die and the broad thermal trace.
19. The method of claim 12 , wherein the location on the surface of the semiconductor die includes a hot spot of the semiconductor die.
20. A semiconductor device, comprising:
a semiconductor die;
a completely electrically isolated and thermally conductive structure disposed around a portion of the semiconductor die; and
a thermally conductive trace disposed between a location on a surface of the semiconductor die and the thermally conductive structure.
21. The semiconductor device of claim 20 , wherein the completely electrically isolated and thermally conductive structure includes a completely electrically isolated and thermally conductive via or completely electrically isolated and thermally conductive channel.
22. The semiconductor device of claim 20 , further including a thermally conductive pad disposed over the surface of the semiconductor die.
23. The semiconductor device of claim 20 , further including:
an encapsulant deposited around the semiconductor die;
an electrically conductive via formed in the encapsulant; and
a signal trace disposed over the surface of the semiconductor die between the electrically conductive via and a contact pad of the semiconductor die.
24. The semiconductor device of claim 20 , further including a heat sink disposed over the semiconductor die.
25. The semiconductor device of claim 20 , further including a plurality of stacked semiconductor die thermally connected through the completely electrically isolated and thermally conductive structure.