5 ringer equivalent number (REN) ringer circuit using a high voltage level translator and a source follower buffer and method therefor
View Patent ↗A 5 Ringer Equivalent Number (REN) ringer circuit has a wave generator. A flip-flop is coupled to the wave generator and has a non-inverting and an inverting output. A high voltage level translator is coupled to each of the non-inverting and the inverting outputs of the flip-flop. A source follower buffer is coupled to an output of each of the high voltage level translators.
1. A 5 Ringer Equivalent Number (REN) ringer circuit comprising:
a wave generator;
a flip-flop coupled to the wave generator and having a non-inverting and an inverting output;
a high voltage level translator having RC shaping coupled to each of the non-inverting and an inverting outputs of the flip-flop and having a collector output terminal; and
a source follower buffer coupled to the collector output terminal of each of the high voltage level translators.
2. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 1 wherein the wave generator generates a square wave.
3. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 1 wherein the source follower buffer comprises a P-channel MOSFET and an N-channel MOSFET coupled as a source follower.
4. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 1 wherein the source follower buffer comprises a PNP bipolar transistor and an NPN bipolar transistor coupled as an emitter follower.
5. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 1 wherein the level translator coupled to the non-inverting output comprises:
a first transistor;
a first resistive element having a first terminal coupled to the non-inverting output of the flip-flop and a second terminal coupled to a base terminal of the first transistor;
a second resistive element having a first terminal coupled to a first voltage supply and a second terminal coupled to an emitter terminal of the first transistor Q 1 ;
a third resistive element having a first terminal coupled to a collector terminal of the first transistor and a second terminal coupled to a second voltage supply;
a first capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the first transistor; and
a second capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of the first transistor.
6. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 5 wherein the level translator coupled to the inverting output comprises:
a second transistor;
a fourth resistive element having a first terminal coupled to the inverting output of the flip-flop and a second terminal coupled to a base terminal of the second transistor;
a fifth resistive element having a first terminal coupled to the second voltage supply and a second terminal coupled to an emitter terminal of the second transistor;
a sixth resistive element having a first terminal coupled to a collector terminal of the second transistor and a second terminal coupled to the second voltage supply;
a third capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the second transistor; and
a fourth capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of second transistor.
7. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 5 wherein the first transistor is a PNP bipolar transistor.
8. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 6 wherein the second transistor is a PNP bipolar transistor.
9. A 5 Ringer Equivalent Number (REN) ringer circuit comprising:
a square wave generator;
a flip-flop coupled to the wave generator and having a non-inverting and an inverting output;
a high voltage level translator with RC shaping coupled to each of the non-inverting and an inverting outputs of the flip-flop and having a collector output terminal; and
a source follower buffer coupled to the collector output terminal of each of the high voltage level translators.
10. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 9 wherein the source follower buffer comprises a P-channel MOSFET and an N-channel MOSFET coupled as a source follower.
11. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 9 wherein the source follower buffer comprises a PNP bipolar transistor and an NPN bipolar transistor coupled as an emitter follower.
12. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 9 wherein the level translator coupled to the non-inverting output comprises:
a first transistor;
a first resistive element having a first terminal coupled to the non-inverting output of the flip-flop and a second terminal coupled to a base terminal of the first transistor;
a second resistive element having a first terminal coupled to a first voltage supply and a second terminal coupled to an emitter terminal of the first transistor;
a third resistive element having a first terminal coupled to a collector terminal of the first transistor and a second terminal coupled to a second voltage supply;
a first capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the first transistor; and
a second capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of the first transistor.
13. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 12 wherein the level translator coupled to the inverting output comprises:
a second transistor;
a fourth resistive element having a first terminal coupled to the inverting output of the flip-flop and a second terminal coupled to a base terminal of the second transistor;
a fifth resistive element having a first terminal coupled to the second voltage supply and a second terminal coupled to an emitter terminal of the second transistor;
a sixth resistive element having a first terminal coupled to a collector terminal of the second transistor and a second terminal coupled to the second voltage supply;
a third capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the second transistor; and
a fourth capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of second transistor.
14. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 12 wherein the first transistor is a PNP bipolar transistor.
15. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 13 wherein the second transistor is a PNP bipolar transistor.
16. A 5 Ringer Equivalent Number (REN) ringer circuit comprising:
a square wave generator;
a flip-flop coupled to the wave generator and having a non-inverting and an inverting output;
a high voltage level translator with RC shaping coupled to each of the non-inverting and an inverting outputs of the flip-flop; and
a source follower buffer coupled to an output collector terminal of each of the high voltage level translators, wherein the source follower buffer comprises a P-channel MOSFET and an N-channel MOSFET coupled as a source follower.
17. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 16 wherein each level translator comprises:
a first transistor;
a first resistive element having a first terminal coupled to the non-inverting output of the flip-flop and a second terminal coupled to a base terminal of the first transistor;
a second resistive element having a first terminal coupled to a first voltage supply and a second terminal coupled to an emitter terminal of the first transistor;
a third resistive element having a first terminal coupled to a collector terminal of the first transistor and a second terminal coupled to a second voltage supply;
a first capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the first transistor; and
a second capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of the first transistor.
18. A 5 Ringer Equivalent Number (REN) ringer circuit comprising:
a square wave generator;
a flip-flop coupled to the wave generator and having a non-inverting and an inverting output;
a high voltage level translator with RC shaping coupled to each of the non-inverting and an inverting outputs of the flip-flop; and
a buffer coupled to an output collector terminal of each of the high voltage level translators, wherein the buffer comprises a PNP bipolar transistor and an NPN bipolar transistor coupled as an emitter follower.
19. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 18 wherein each level translator comprises:
a first transistor;
a first resistive element having a first terminal coupled to the non-inverting output of the flip-flop and a second terminal coupled to a base terminal of the first transistor;
a second resistive element having a first terminal coupled to a first voltage supply and a second terminal coupled to an emitter terminal of the first transistor;
a third resistive element having a first terminal coupled to a collector terminal of the first transistor and a second terminal coupled to a second voltage supply;
a first capacitive element having a first terminal coupled to the second voltage supply and a second terminal coupled to the base terminal of the first transistor; and
a second capacitive element having a first terminal coupled to the second voltage source and a second terminal coupled to the collector terminal of the first transistor.
20. A 5 Ringer Equivalent Number (REN) ringer circuit in accordance with claim 19 wherein the transistor is a PNP bipolar transistor.