Transponder and method for operating a transponder
A transponder and method for operating a transponder, which has a capacitor (C buf ) for storing power transmitted via an air interface and an arithmetic logic unit ( 10 ) that can be supplied with the stored power, in which a capacitor voltage (V C ) of the capacitor (C buf ) is compared with a first threshold (V 1 ), in which the capacitor voltage (V C ) is compared with a second threshold (V 2 ), whereby the first threshold (V 1 ) and the second threshold (V 2 ) are different, in which in a first operating mode (M 1 ), when the capacitor voltage (V C ) is above the first threshold (V 1 ), the arithmetic logic unit ( 10 ) performs a number of routines with a different priority, in which in a second operating mode (M 2 ), when the capacitor voltage (V C ) is between the first threshold (V 1 ) and the second threshold (V 2 ), a number of low-priority routines are stopped and a number of high-priority routines are continued.
1. A method comprising:
comparing a capacitor voltage of a capacitor of a transponder, the capacitor for storing power transmitted via an air interface, with a threshold voltage, the transponder having an arithmetic logic unit configured to be supplied with the at least a portion of the stored power;
determining, at a first time and in response to determining that the capacitor voltage of the capacitor exceeds the threshold, to operate in a first operating mode, the first operating mode comprising performing a number of routines having different associated priorities;
updating a status register of the arithmetic logic unit with an indicator of the determined first operating mode;
determining, at a second time and in response to determining that the capacitor voltage of the capacitor is below the threshold, to operate in a second operating mode, the second operating mode suspending at least one low-priority routine at a place within a run of the at least one low-priority routine and continuing at least one higher-priority routine;
updating a status register of the arithmetic logic unit with an indicator of the second operating mode; and
resuming, in response to determining at a third time that the capacitor voltage of the capacitor exceeds the threshold, the at least one previously-suspended low-priority routine from the place within the run at which the at least one previously-suspended low-priority routine was suspended.
2. The method of claim 1 , wherein suspending the at least one low-priority routine comprises stopping the at least one low-priority routine.
3. The method of claim 1 , wherein suspending the at least one low-priority routine comprises storing register values of the at least one low-priority routine in a non-volatile memory.
4. The method of claim 1 , further comprising, in response to an interrupt signal, interrupting a program run in the arithmetic logic unit, the interrupt signal being generated based on the comparison of the capacitor voltage with the threshold voltage.
5. The method of claim 1 , wherein the at least one higher-priority routine comprises a routine whose register values must be stored.
6. A transponder comprising:
a capacitor configured to store power transmitted via an air interface;
a comparator configured to:
compare a capacitor voltage of the capacitor with a threshold voltage;
and
an arithmetic logic unit supplied with the stored power from the capacitor, the arithmetic logic unit configured to:
determine, at a first time and in response to determining that the capacitor voltage of the capacitor exceeds the threshold, to operate in a first operating mode, the first operating mode comprising performing a number of routines having different associated priorities;
update a status register of the arithmetic logic unit with an indicator of the determined first operating mode;
determine, at a second time and in response to determining that the capacitor voltage of the capacitor is below the threshold, to operate in a second operating mode, the second operating mode comprising suspending at least one low-priority routine at a place within a run of the at least one low-priority routine and continuing at least one higher-priority routine;
update a status register of the arithmetic logic unit with an indicator of the second operating mode; and
resume, in response to determining at a third time that the capacitor voltage of the capacitor exceeds the threshold, the at least one previously-suspended low-priority routine from the place within the run at which the at least one previously-suspended low-priority routine was suspended.
7. The transponder of claim 6 , wherein to suspend the at least one low-priority routine, the arithmetic logic unit is further configured to stop the at least one low-priority routine.
8. The transponder of claim 6 , wherein to suspend the at least one low-priority routine, the arithmetic logic unit is further configured to store register values of the at least one low-priority routine in a non-volatile memory.
9. The transponder of claim 6 , wherein the arithmetic logic unit is further configured to, in response to an interrupt signal, interrupt a program run in the arithmetic logic unit, the interrupt signal being generated based on the comparison of the capacitor voltage with the threshold voltage.
10. The transponder of claim 6 , wherein the at least one higher-priority routine comprises a routine whose register values must be stored.
11. One or more non-transitory computer-readable storage media embodying logic that is operable when executed to:
receive a comparison of a capacitor voltage of a capacitor with a threshold voltage, the capacitor storing power transmitted via an air interface;
determine, at a first time and in response to determining that the capacitor voltage of the capacitor exceeds the threshold, to operate in a first operating mode, the first operating mode comprising performing a number of routines having different associated priorities;
update a status register of an arithmetic logic unit with an indicator of the determined first operating mode;
determine, at a second time and in response to determining that the capacitor voltage of the capacitor is below the threshold, to operate in a second operating mode, the second operating mode comprising suspending at least one low-priority routine at a place within a run of the at least one low-priority routine and continuing at least one higher-priority routine;
update a status register of the arithmetic logic unit with an indicator of the second operating mode; and
resume, in response to determining at a third time that the capacitor voltage of the capacitor exceeds the threshold, the at least one previously suspended low-priority routine from the place within the run at which the at least one previously-suspended low-priority routine was suspended.
12. The media of claim 11 , wherein to suspend the at least one low-priority routine, the logic is further operable when executed to stop the at least one low-priority routine.
13. The media of claim 11 , wherein to suspend the at least one low-priority routine, the logic is further operable when executed to store register values of the at least one low-priority routine in a non-volatile memory.
14. The media of claim 11 , wherein the at least one higher-priority routine comprises a routine whose register values must be stored.