Methods of forming replacement gate structures on semiconductor devices and the resulting device
One method includes forming first sidewall spacers adjacent opposite sides of a sacrificial gate structure and a gate cap layer, removing the gate cap layer and a portion of the first sidewall spacers to define reduced-height first sidewall spacers, forming second sidewall spacers, removing the sacrificial gate structure to thereby define a gate cavity, whereby a portion of the gate cavity is laterally defined by the second sidewall spacers, and forming a replacement gate structure in the gate cavity, wherein at least a first portion of the replacement gate structure is positioned between the second sidewall spacers. A device includes a gate structure positioned above the substrate between first and second spaced-apart portions of a layer of insulating material and a plurality of first sidewall spacers, each of which are positioned between the gate structure and on one of the first and second portions of the layer of insulating material.
1. A method, comprising:
forming a sacrificial gate structure and a gate cap layer above said sacrificial gate structure;
forming first sidewall spacers adjacent opposite sides of said sacrificial gate structure and said gate cap layer;
forming a layer of insulating material adjacent each of said first sidewall spacers;
performing at least one etching process to remove said gate cap layer and a portion of said first sidewall spacers so as to expose portions of said layer of insulating material and to define reduced-height first sidewall spacers;
forming second sidewall spacers on said exposed portions of said layer of insulating material, wherein each of said second sidewall spacers is positioned above one of said reduced-height first sidewall spacers;
after forming said second sidewall spacers, removing said sacrificial gate structure to thereby define a gate cavity, whereby a portion of said gate cavity is laterally defined by said second sidewall spacers; and
forming a replacement gate structure in said gate cavity, wherein at least a first portion of said replacement gate structure is positioned between said second sidewall spacers.
2. The method of claim 1 , wherein said first sidewall spacers and said gate cap layer are comprised of silicon nitride.
3. The method of claim 1 , wherein said second sidewall spacers are comprised of silicon nitride, silicon carbon or silicon carbon boron nitride.
4. The method of claim 1 , wherein said layer of insulating material is comprised of a flowable silicon dioxide material.
5. The method of claim 1 , wherein said replacement gate structure comprises a gate insulation layer comprised of a high-k insulating material and a gate electrode comprised of at least one layer of metal.
6. The method of claim 1 , wherein said step of removing at least said sacrificial gate structure comprises performing at least one etching process to remove said sacrificial gate structure.
7. The method of claim 1 , wherein, after forming said second sidewall spacers, performing an etching process on said reduced-height first sidewall spacers to form a recess in said reduced-height first sidewall spacers, wherein said recess is self-aligned with respect to said second sidewall spacers, and wherein said step of removing said sacrificial gate structure is performed after said recess is formed in said first sidewall spacers.
8. The method claim 7 , wherein at least a second portion of said replacement gate structure is positioned between said recesses in said first sidewall spacers.
9. The method of claim 1 , wherein each of said second sidewall spacers contacts one of said reduced-height sidewall spacers.
10. A method, comprising:
forming a sacrificial gate structure and a gate cap layer above said sacrificial gate structure;
forming first sidewall spacers adjacent opposite sides of said sacrificial gate structure and said gate cap layer;
forming a layer of insulating material adjacent each of said first sidewall spacers;
performing at least one etching process to remove said gate cap layer and a portion of said first sidewall spacers so as to expose portions of said layer of insulating material and to define reduced-height first sidewall spacers;
forming second sidewall spacers on said exposed portions of said layer of insulating material, wherein each of said second sidewall spacers is positioned above one of said reduced-height first sidewall spacers;
after forming said second sidewall spacers, performing an etching process on said reduced-height first sidewall spacers to form a recess in said reduced-height first sidewall spacers, wherein said recess is self-aligned with respect to said second sidewall spacers;
after forming recesses in said reduced-height first sidewall spacers, removing said sacrificial gate structure to thereby define a gate cavity, whereby a first portion of said gate cavity is laterally defined by said second sidewall spacers and a second portion of said gate cavity is laterally defined by said recesses; and
forming a replacement gate structure in said gate cavity, wherein at least a first portion of said replacement gate structure is positioned between said second sidewall spacers and a second portion of said replacement gate structure is positioned between said recesses.
11. The method of claim 10 , wherein said each of said second sidewall spacers contacts one of said reduced-height sidewall spacers.
12. The method of claim 11 , wherein said gate cap layer is comprised of silicon nitride.
13. The method of claim 10 , wherein said sacrificial gate structure is comprised of a silicon dioxide gate insulation layer and a polysilicon gate electrode positioned above said gate insulation layer.
14. The method of claim 10 , wherein said replacement gate structure comprises a gate insulation layer comprised of a high-k insulating material and a gate electrode comprised of at least one layer of metal.
15. The method of claim 10 , wherein said step of removing at least said sacrificial gate electrode comprises performing at least one etching process to remove at least said sacrificial gate electrode.