Robust replacement gate integration
View Patent ↗A method including forming a dummy gate on a substrate, wherein the dummy gate includes an oxide, forming a pair of dielectric spacers on opposite sides of the dummy gate, and forming an inter-gate region above the substrate and in contact with at least one of the pair of dielectric spacers, the inter-gate region comprising a protective layer on top of a first oxide layer, wherein the protective layer comprises a material resistant to etching techniques designed to remove oxide. The method may further include removing the dummy gate to leave an opening, and forming a gate within the opening.
1. A method comprising:
forming a dummy gate on a substrate, wherein the dummy gate is made from an oxide;
forming a pair of dielectric spacers on opposite sides of the dummy gate;
forming an inter-gate region above the substrate and, the inter-gate region comprising a protective layer on top of a first oxide layer, the protective layer and the first oxide layer each being in direct contact with at least one of the pair of dielectric spacers;
removing the dummy gate selective to the protective layer to leave an opening; and
forming a gate within the opening.
2. The method of claim 1 , further comprising:
forming a dielectric capping layer above the gate and the inter-gate region;
forming an inter-level dielectric layer above the dielectric capping layer; and
forming a contact extending from a top surface of the inter-level dielectric layer to the substrate, and extending through the inter-level dielectric layer, the dielectric capping layer, and the inter-gate region.
3. The method of claim 1 , wherein the protective layer comprises SiBCN.
4. The method of claim 1 , wherein the protective layer comprises amorphous silicon.
5. The method of claim 1 , wherein the gate comprises a gate dielectric, a work function metal, and a metal gate.
6. A method comprising:
forming a dummy gate on a substrate, wherein the dummy gate is made from an oxide;
forming a pair of dielectric spacers on opposite sides of the dummy gate;
forming an inter-gate region above the substrate and adjacent to the dummy gate, the inter-gate region comprising a gap fill layer on top of a dielectric liner, wherein the dielectric liner is an oxide and in direct contact with the at least one of the pair of dielectric spacers and the substrate, and wherein the gap fill layer does not contact either the at least one of the pair of dielectric spacers or the substrate;
removing the dummy gate to leave an opening; and
forming a gate within the opening.
7. The method of claim 6 , further comprising:
forming a dielectric capping layer above the gate and the inter-gate region;
forming an inter-level dielectric layer above the dielectric capping layer; and
forming a contact extending from a top surface of the inter-level dielectric layer to the substrate, and extending through the inter-level dielectric layer, the dielectric capping layer, and the inter-gate region.
8. The method of claim 6 , wherein removing the dummy gate to leave an opening comprises removing the dummy gate selective to the gap fill layer.
9. The method of claim 6 , wherein the gap fill layer comprises amorphous silicon.
10. The method of claim 6 , further comprising:
replacing all of the gap fill layer with an oxide replacement layer.
11. The method of claim 6 , wherein the gate comprises a gate dielectric, a work function metal, and a metal gate.